PIC24FV32KA302T-I/SS Microchip Technology, PIC24FV32KA302T-I/SS Datasheet - Page 162

32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SSOP .209in T

PIC24FV32KA302T-I/SS

Manufacturer Part Number
PIC24FV32KA302T-I/SS
Description
32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SSOP .209in T
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24FV32KA302T-I/SS

Processor Series
PIC24FV
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
23
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FV32KA302T-I/SS
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24FV32KA304 FAMILY
REGISTER 15-1:
DS39995B-page 162
bit 2-0
Note 1:
The comparator module used for Fault input varies with the OCx module. OC1 and OC2 use
Comparator 1; OC3 and OC4 use Comparator 2; OC5 uses Comparator 3.
OCM<2:0>: Output Compare x Mode Select bits
111 = Center-Aligned PWM mode on OCx
110 = Edge-Aligned PWM mode on OCx
101 = Double Compare Continuous Pulse mode: initialize OCx pin low, toggle OCx state continuously
100 = Double Compare Single-Shot mode: initialize OCx pin low, toggle OCx state on matches of
011 = Single Compare Continuous Pulse mode: compare events continuously toggle the OCx pin
010 = Single Compare Single-Shot mode: initialize OCx pin high, compare event forces the OCx pin low
001 = Single Compare Single-Shot mode: initialize OCx pin low, compare event forces the OCx pin high
000 = Output compare channel is disabled
OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1 (CONTINUED)
on alternate matches of OCxR and OCxRS
OCxR and OCxRS for one cycle
(1)
 2011 Microchip Technology Inc.

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