PIC32MX764F128H-I/MR Microchip Technology, PIC32MX764F128H-I/MR Datasheet - Page 165

• Manufacturer Part Number: PIC32MX764F128H-I/MR
• Description: 64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, Ethernet, 4 DMA 64 QFN 9x9x0.9
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX764F128H-I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC32MX5x
• Core: MIPS32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 28-2:
© 2010 Microchip Technology Inc.
bit 15-14
bit 13-12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4-3
bit 2-0
Note 1:
Do not disable the P
FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
FPBDIV<1:0>: Peripheral Bus Clock Divisor Default Value bits
11 = PBCLK is SYSCLK divided by 8
10 = PBCLK is SYSCLK divided by 4
01 = PBCLK is SYSCLK divided by 2
00 = PBCLK is SYSCLK divided by 1
Reserved: Write ‘ 1 ’
OSCIOFNC: CLKO Enable Configuration bit
1 = CLKO output disabled
0 = CLKO output signal active on the OSCO pin; Primary Oscillator must be disabled or configured for
POSCMOD<1:0>: Primary Oscillator Configuration bits
11 = Primary Oscillator disabled
10 = HS Oscillator mode selected
01 = XT Oscillator mode selected
00 = External Clock mode selected
IESO: Internal External Switchover bit
1 = Internal External Switchover mode is enabled (Two-Speed Start-up is enabled)
0 = Internal External Switchover mode is disabled (Two-Speed Start-up is disabled)
Reserved: Write ‘ 1 ’
FSOSCEN: Secondary Oscillator Enable bit
1 = Enable Secondary Oscillator
0 = Disable Secondary Oscillator
Reserved: Write ‘ 1 ’
FNOSC<2:0>: Oscillator Selection bits
111 = Fast RC Oscillator with divide-by-N (FRCDIV)
110 = FRCDIV16 Fast RC Oscillator with fixed divide-by-16 postscaler
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (S
011 = Primary Oscillator (P
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with divide-by-N with PLL module (FRCDIV+PLL)
000 = Fast RC Oscillator (FRC)
the External Clock mode (EC) for the CLKO to be active (POSCMOD<1:0> = 11 or 00 )
DEVCFG1: DEVICE CONFIGURATION WORD 1 (CONTINUED)
OSC
(POSCMOD = 11 ) when using this oscillator source.
OSC
OSC
) with PLL module (XT+PLL, HS+PLL, EC+PLL)
)
(1)
PIC32MX5XX/6XX/7XX
DS61156F-page 165