ADV7340BSTZ Analog Devices Inc, ADV7340BSTZ Datasheet - Page 99

• Manufacturer Part Number: ADV7340BSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7340BSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 12b
• Screening Level: Industrial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Table 80. 20-Bit 625i YCrCb In, YPrPb and CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x88
0x8A
Table 81. 20-Bit 625i YCrCb In, RGB and CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x02
0x80
0x82
0x88
0x8A
Table 82. 30-Bit 625i RGB In, YPrPb and CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x87
0x88
0x8A
Setting
0x02
0xFC
0x00
0x11
0xC1
0x18
0x0C
Setting
0x02
0xFC
0x00
0x10
0x11
0xC1
0x18
0x0C
Setting
0x02
0xFC
0x00
0x11
0xC1
0x80
0x10
0x0C
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
20-bit input enabled.
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. RGB and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
20-bit input enabled.
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
RGB input enabled.
10-bit input enabled (10 × 3 = 30-bit).
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Rev. A | Page 99 of 108
Table 83. 30-Bit 625i RGB In, RGB and CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x02
0x80
0x82
0x87
0x88
0x8A
Table 84. 10-Bit PAL Square Pixel YCrCb In (EAV/SAV),
CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x88
0x8C
0x8D
0x8E
0x8F
Table 85. 30-Bit PAL Square Pixel RGB In, CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x87
0x88
0x8A
0x8C
0x8D
0x8E
0x8F
Setting
0x02
0xFC
0x00
0x10
0x11
0xC1
0x80
0x10
0x0C
Setting
0x02
0x1C
0x00
0x11
0xD3
0x10
0x0C
0x8C
0x79
0x26
Setting
0x02
0x1C
0x00
0x11
0xD3
0x80
0x10
0x0C
0x0C
0x8C
0x79
0x26
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. RGB and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
RGB input enabled.
10-bit input enabled (10 × 3 = 30-bit).
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. CVBS/Y-C (S-Video)
out. SSAF PrPb filter enabled. Active
video edge control enabled. Square
pixel mode enabled.
10-bit YCbCr input enabled.
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in PAL square pixel mode (29.5 MHz
input clock).
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. CVBS/Y-C (S-Video)
out. SSAF PrPb filter enabled. Active
video edge control enabled. Square
pixel mode enabled.
RGB input enabled.
30-bit RGB input enabled.
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in PAL square pixel mode (29.5 MHz
input clock).
ADV7340/ADV7341