ADV7175AKSZ Analog Devices Inc, ADV7175AKSZ Datasheet

no-image

ADV7175AKSZ

Manufacturer Part Number
ADV7175AKSZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7175AKSZ

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
MQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant
a
NOTE: ITU-R and CCIR are used interchangeably in this document (ITU-R has replaced CCIR recommendations).
This device is protected by U.S. Patent Numbers 4631603, 4577216, 4819098 and other intellectual property rights. The Macrovision anticopy process is
licensed for noncommercial home use only, which is its sole intended use in the device. Please contact sales office for latest Macrovision version available.
Protected by U.S. patents numbers 5,343,196 and 5,442,355 and other intellectual property rights.
FIELD/VSYNC
TTXREQ
P15–P8
HSYNC
BLANK
COLOR
DATA
P7–P0
TTX
V
AA
POLATOR
4:2:2 TO
INTER-
4:4:4
VIDEO TIMING
GENERATOR
CLOCK
INSERTION
TELETEXT
8
BLOCK
8
8
MATRIX
YCrCb
YUV
TO
RESET
SCLOCK SDATA ALSB
8
8
8
BURST
BURST
I
SYNC
2
ADD
ADD
ADD
C MPU PORT
FUNCTIONAL BLOCK DIAGRAM
8
8
8
POLATOR
POLATOR
POLATOR
INTER-
INTER-
INTER-
High Quality, 10-Bit, Digital CCIR-601
SCRESET/RTC
8
8
8
REAL-TIME
CONTROL
CIRCUIT
LOW-PASS
LOW-PASS
LOW-PASS
FILTER
FILTER
FILTER
GENERAL DESCRIPTION
The ADV7175A/ADV7176A is an integrated digital video encoder
that converts Digital CCIR-601 4:2:2 8 or 16-bit component
video data into a standard analog baseband television signal
Y
U
V
10
10
to PAL/NTSC Video Encoder
10
DDS BLOCK
SIN/COS
ADV7175A/ADV7176A
YUV TO
MATRIX
10
RBG
10
ADV7175A/ADV7176A
GND
M
U
P
E
X
E
R
L
T
L
I
REFERENCE
10
10
10
10
VOLTAGE
CIRCUIT
10-BIT
10-BIT
10-BIT
10-BIT
DAC
DAC
DAC
DAC
(Continued on page 11)
DAC A (PIN 32)
V
R
COMP
DAC D (PIN 27)
DAC C (PIN 26)
DAC B (PIN 31)
REF
SET

Related parts for ADV7175AKSZ

ADV7175AKSZ Summary of contents

Page 1

TELETEXT TTX INSERTION TTXREQ BLOCK COLOR DATA YCrCb P7–P0 4:2 4:4:4 YUV INTER- P15–P8 MATRIX POLATOR 8 HSYNC VIDEO TIMING FIELD/VSYNC GENERATOR BLANK CLOCK RESET Protected by U.S. patents numbers 5,343,196 and 5,442,355 ...

Page 2

ADV7175A/ADV7176A–SPECIFICATIONS 5 V SPECIFICATIONS ( Parameter STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential Nonlinearity DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, V INL 3 Input Current ...

Page 3

V SPECIFICATIONS (V AA Parameter 3 STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential Nonlinearity DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, V INL 3, 4 Input Current Input ...

Page 4

ADV7175A/ADV7176A–SPECIFICATIONS 5 V DYNAMIC SPECIFICATIONS Parameter Filter Characteristics 3 Luma Bandwidth (Low-Pass Filter) Stopband Cutoff Passband Cutoff Chroma Bandwidth Stopband Cutoff Passband Cutoff Luma Bandwidth (Low-Pass Filter) Stopband Cutoff Passband Cutoff F 3 ...

Page 5

V DYNAMIC SPECIFICATIONS Parameter Filter Characteristics 3 Luma Bandwidth (Low-Pass Filter) Stopband Cutoff Passband Cutoff Chroma Bandwidth Stopband Cutoff Passband Cutoff Luma Bandwidth (Low-Pass Filter) Stopband Cutoff Passband Cutoff ...

Page 6

ADV7175A/ADV7176A 5 V TIMING SPECIFICATIONS Parameter 3, 4 MPU PORT SCLOCK Frequency SCLOCK High Pulsewidth SCLOCK Low Pulsewidth Hold Time (Start Condition Setup Time (Start Condition Data Setup Time SDATA, ...

Page 7

V TIMING SPECIFICATIONS Parameter 3, 4 MPU PORT SCLOCK Frequency SCLOCK High Pulsewidth SCLOCK Low Pulsewidth Hold Time (Start Condition Setup Time (Start Condition Data Setup Time SDATA, SCLOCK ...

Page 8

ADV7175A/ADV7176A SDATA SCLOCK CLOCK HSYNC, CONTROL FIELD/VSYNC, I/PS BLANK PIXEL INPUT DATA HSYNC, CONTROL FIELD/VSYNC, O/PS BLANK TTXREQ t 16 CLOCK t 17 TTX 4 CLOCK CYCLES ...

Page 9

ABSOLUTE MAXIMUM RATINGS V to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 10

ADV7175A/ADV7176A Pin No. Mnemonic 1, 11, 20, 28 10, 19, 21, 29, 43 GND HSYNC 15 16 FIELD/VSYNC BLANK 17 18 ALSB RESET 22 23 SCLOCK 24 SDATA 25 COMP 26 DAC C 27 DAC D 31 ...

Page 11

The 4:2:2 YUV video data is interpolated to two times the pixel rate. The color- difference components (UV) are quadrature modulated using a subcarrier frequency generated by an on-chip 32-bit digital synthesizer ...

Page 12

ADV7175A/ADV7176A 0 –10 TYPE A –20 –30 –40 –50 – FREQUENCY – MHz 0 –10 –20 –30 –40 –50 – FREQUENCY – MHz 0 –10 TYPE B –20 –30 –40 ...

Page 13

FREQUENCY – MHz COLOR BAR GENERATION The ADV7175A/ADV7176A can be configured to generate 100/7.5/75/7.5 for NTSC color bars or 100/0/75/0 for PAL color bars. These are enabled by ...

Page 14

ADV7175A/ADV7176A COMPOSITE VIDEO e.g., VCR OR CABLE VIDEO DECODER ADV7185 H/LTRANSITION COUNT START LOW 128 RESERVED 13 RTC TIME SLOT: 01 ADV7175A/ADV7176A NOTES PLL INCREMENT IS 22 BITS LONG, VALUED LOADED INTO ADV7175A/ADV7176A FSC DDS REGISTER IS SC ...

Page 15

ANALOG VIDEO INPUT PIXELS NTSC/PAL M SYSTEM (525 LlNES/60Hz) PAL SYSTEM (625 LINES/50Hz) Mode 0 (CCIR-656): Master Option (Timing Register 0 TR0 = The ADV7175A/ADV7176A generates H, V and F signals required ...

Page 16

ADV7175A/ADV7176A DISPLAY 622 623 624 625 H V EVEN FIELD F DISPLAY 309 310 311 312 ODD FIELD ANALOG VIDEO VERTICAL BLANK ODD FIELD VERTICAL BLANK 313 314 ...

Page 17

Mode 1: Slave Option HSYNC, BLANK, FIELD (Timing Register 0 TR0 = this mode the ADV7175A/ADV7176A accepts horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD input when HSYNC ...

Page 18

ADV7175A/ADV7176A Mode 1: Master Option HSYNC, BLANK, FIELD (Timing Register 0 TR0 = this mode the ADV7175A/ADV7176A can generate horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD input ...

Page 19

DISPLAY 622 623 624 625 HSYNC BLANK VSYNC EVEN FIELD DISPLAY 309 310 311 312 HSYNC BLANK VSYNC ODD FIELD Mode 2: Master Option HSYNC, VSYNC, BLANK (Timing Register 0 TR0 = ...

Page 20

ADV7175A/ADV7176A Mode 3: Master/Slave Option HSYNC, BLANK, FIELD (Timing Register 0 TR0 = this mode, the ADV7175A/ADV7176A accepts or generates Horizontal SYNC ...

Page 21

POWER-ON RESET After power-up necessary to execute a reset operation. A reset occurs on the falling edge of a high-to-low transition on the RESET pin. This initializes the pixel port so that the pixel inputs, P7–P0 are selected. ...

Page 22

ADV7175A/ADV7176A also access any unique subaddress register on a one by one basis without having to update all the registers. There is one excep- tion. The subcarrier frequency registers should be updated in sequence, starting with Subcarrier Frequency Register 0. ...

Page 23

REGISTER ACCESSES The MPU can write to or read from all of the ADV7175A/ ADV7176A registers except the subaddress register, which is a write-only register. The subaddress register determines which register the next read or write operation accesses. All communi- ...

Page 24

ADV7175A/ADV7176A MODE REGISTER 1 MR1 (MR17–MR10) (Address (SR4–SR0) = 01H) Figure 33 shows the various operations under the control of Mode Register 1. This register can be read from as well as written to. MR1 BIT DESCRIPTION Interlaced Mode Control ...

Page 25

CLOSED CAPTIONING EVEN FIELD DATA REGISTER 1–0 (CED15–CED0) (Address [SR4–SR0] = 09–08H) These 8-bit-wide registers are used to set up the closed captioning extended data bytes on even fields. Figure 36 shows how the high and low bytes are set ...

Page 26

ADV7175A/ADV7176A MR27 RGB/YUV CONTROL MR26 0 RGB OUTPUT 1 YUV OUTPUT LOWER POWER MODE MR27 0 DISABLE 1 ENABLE Genlock Selection (MR22–MR21) These bits control the genlock feature of the ADV7175A/ ADV7176A. Setting MR21 to a Logic “1” configures the ...

Page 27

Input Default Color (MR36) This bit determines the default output color from the DACs for zero input data (or disconnected). A Logical “0” means that the color corresponding to 00000000 will be displayed. A Logical “1” forces the output color ...

Page 28

ADV7175A/ADV7176A BOARD DESIGN AND LAYOUT CONSIDERATIONS The ADV7175A/ADV7176A is a highly integrated circuit contain- ing both precision analog and high speed digital circuitry. It has been designed to minimize interference effects on the integrity of the analog circuitry by the ...

Page 29

AA 0.1 F 2–9, 12– RESET 100nF “UNUSED INPUTS SHOULD GROUNDED” 100k TTX TTX REQ 100k 5V (V TELETEXT PULL-UP AND PULL-DOWN RESISTORS SHOULD ONLY ...

Page 30

ADV7175A/ADV7176A The ADV7175A/ADV7176A supports closed captioning, conforming to the standard television synchronizing waveform for color transmission. Closed captioning is transmitted during the blanked active line time of Line 21 of the odd fields and Line 284 of even fields. Closed ...

Page 31

Time T time needed by the ADV7175A/ADV7176A to interpolate input data on TTX and insert it onto the CVBS or Y outputs 10.2 µs after the leading edge of the horizontal signal. Time TTX such that it appears ...

Page 32

ADV7175A/ADV7176A 130.8 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 963.8mV 286mV (p-p) 650mV 335.2mV 0mV 100 IRE 7.5 IRE 0 IRE –40 IRE APPENDIX 4 NTSC WAVEFORMS (WITH PEDESTAL) 629.7mV ...

Page 33

NTSC WAVEFORMS (WITHOUT PEDESTAL) 130.8 IRE 100 IRE 0 IRE –40 IRE 100 IRE 0 IRE –40 IRE 978mV 286mV (p-p) 650mV 299.3mV 0mV 100 IRE 0 IRE –40 IRE ADV7175A/ADV7176A PEAK COMPOSITE 1289.8mV REF WHITE 1052.2mV 714.2mV BLANK/BLACK LEVEL ...

Page 34

ADV7175A/ADV7176A 1284.2mV 1047.1mV 350.7mV 50.8mV 1047mV 350.7mV 50.8mV 989.7mV 307mV (p-p) 650mV 317.7mV 0mV 1050.2mV 351.8mV 51mV PAL WAVEFORMS PEAK COMPOSITE 696.4mV BLANK/BLACK LEVEL 696.4mV BLANK/BLACK LEVEL 672mV (p-p) 698.4mV BLANK/BLACK LEVEL REF WHITE SYNC LEVEL REF WHITE SYNC LEVEL ...

Page 35

BETACAM LEVEL 0mV 171mV 334mV 505mV 467mV 309mV 158mV BETACAM LEVEL 0mV –158mV –309mV –467mV 350mV 232mV 118mV SMPTE LEVEL 0mV –118mV –232mV –350mV UV WAVEFORMS BETACAM LEVEL 82mV 0mV 0mV BETACAM LEVEL 76mV 0mV 0mV SMPTE ...

Page 36

ADV7175A/ADV7176A The ADV7175A/ADV7176A registers can be set depending on the user standard required. The following examples give the various register formats for several video standards. In each case the output is set to composite o/p with all DACs powered up ...

Page 37

If an output filter is required for the CVBS, Y, UV, Chroma and RGB outputs of the ADV7175A/ADV7176A, the following filter in Figure 67 can be used. Plots of the filter characteristics are shown in Figures 68. An output filter ...

Page 38

ADV7175A/ADV7176A For external buffering of the ADV7175A/ADV7176A DAC outputs, the configuration in Figure 69 is recommended. This configu- ration shows the DAC outputs running at half (18 mA) their full current (36 mA) capability. This will allow the ADV7175A/ADV7176A to ...

Page 39

OUTPUT WAVEFORMS 0.6 0.4 0.2 0.0 0.2 L608 0.0 10.0 20.0 NOISE REDUCTION: 0.00 dB APL = 39.1% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0. 6.72 s 0.5 0.0 L575 0.0 10.0 20.0 APL NEEDS SYNC ...

Page 40

ADV7175A/ADV7176A 0.5 0.0 –0.5 L575 10.0 APL NEEDS SYNC = SOURCE! 625 LINE PAL SLOW CLAMP TO 0. 6.72 s 100.0 0.5 50.0 0.0 –50.0 0.0 APL = 44.6% 525 LINE NTSC SLOW CLAMP TO 0. ...

Page 41

F2 L238 10.0 20.0 NOISE REDUCTION: 15.05dB APL = 44.7% PRECISION MODE OFF 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0. 6.72 s 0.4 50.0 0.2 0.0 –0.2 –50.0 –0.4 ...

Page 42

ADV7175A/ADV7176A APL = 39. SOUND IN SYNC OFF APL = 45.1% YI –Q SETUP 7. 75% 100 R 100% 75 ...

Page 43

COLOR BAR (NTSC) WFM --> FIELD = 2 LINE = 28 LUMINANCE LEVEL (IRE) 0.4 0.2 0.2 0.0 30.0 20.0 10.0 0.0 –10.0 CHROMINANCE LEVEL (IRE) 0.0 –0.2 –0.2 –0.3 1.0 0.0 –1.0 CHROMINANCE PHASE (DEG ...

Page 44

ADV7175A/ADV7176A LUMINANCE NONLINEARITY (NTSC) FIELD = 2 LINE = 21 LUMINANCE NONLINEARITY (%) 99.9 100.4 100.3 100.2 100.1 100.0 99.9 99.8 99.7 99.6 99.5 99.4 99.3 99.2 99.1 99.0 98.9 98.8 98.7 98.6 1ST CHROMINANCE AM PM (NTSC) FULL FIELD ...

Page 45

NOISE SPECTRUM (NTSC) WFM --> FIELD = 2 LINE = 64 AMPLITUDE ( 714mV p-p) BANDWIDTH 100kHz TO FULL –5.0 –10.0 –15.0 –20.0 –25.0 –30.0 –35.0 –40.0 –45.0 –50.0 –55.0 –60.0 –65.0 –70.0 –75.0 –80.0 –85.0 –90.0 –95.0 ...

Page 46

ADV7175A/ADV7176A PARADE SMPTE/EBU PAL mV Y(A) 700 600 500 400 300 200 100 0 100 200 300 LIGHTNING L183 YI –274.82 0.93% YI 462.80 –0.50% G 307.54 –0.21% R 156.63 –0.22% CY –262.17 –0.13% COLOR P-P: B-Y 532.33mV Pk-WHITE: 700.4mV ...

Page 47

COMPONENT NOISE LINE = 202 AMPLITUDE (0dB = 700mV p-p) NOISE dB RMS BANDWIDTH 10kHz TO 5.0MHz 0.0 –5.0 –10.0 –15.0 –20.0 –25.0 –30.0 –35.0 –40.0 –45.0 –50.0 –55.0 –60.0 –65.0 –70.0 –75.0 –80.0 –85.0 –90.0 –95.0 –100.0 1.0 2.0 ...

Page 48

ADV7175A/ADV7176A RGB PARADE SMPTE/EBU mV GREEN (A) 700 600 500 400 300 200 100 0 100 200 300 20 --> 32 COMPONENT VECTOR SMPTE/EBU, 75 BLUE (B) 700 600 500 400 300 200 100 ...

Page 49

INDEX Contents FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 50

ADV7175A/ADV7176A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic Quad Flatpack (S-44) 0.548 (13.925) 0.546 (13.875) 0.096 (2.44) 0.398 (10.11) MAX 0.390 (9.91) 0.037 (0.94) 8° 0.025 (0.64) 33 0.8° 34 SEATING PLANE TOP VIEW (PINS DOWN ...

Related keywords