ADV7170KS-REEL Analog Devices Inc, ADV7170KS-REEL Datasheet - Page 24

• Manufacturer Part Number: ADV7170KS-REEL
• Manufacturer: Analog Devices Inc

Specifications of ADV7170KS-REEL

• Adc/dac Resolution: 10b
• Screening Level: Industrial
• Package Type: MQFP
• Pin Count: 44
• Lead Free Status / RoHS Status: Not Compliant

ADV7170/ADV7171
Mode 2: Master Option HSYNC, VSYNC, BLANK
(Timing Register 0 TR0 = X X X X X 1 0 1)
In this mode the ADV7170/ADV7171 can generate horizontal and vertical SYNC signals. A coincident low transition of both HSYNC and
VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field. The
BLANK signal is optional. When the BLANK input is disabled, the ADV7170/ADV7171 automatically blank all normally blank lines as
per CCIR-624. Mode 2 is shown in
even-to-odd field transition relative to the pixel data.
transition relative to the pixel data.
HSYNC
BLANK
HSYNC
BLANK
VSYNC
VSYNC
HSYNC
BLANK
VSYNC
PIXEL
HSYNC
VSYNC
BLANK
DATA
PIXEL
DATA
622
309
DISPLAY
DISPLAY
623
310
NTSC = 16 × CLOCK/2
NTSC = 16 × CLOCK/2
PAL = 12 × CLOCK/2
PAL = 12 × CLOCK/2
Figure 27
624
311
EVEN FIELD
Figure 30. Timing Mode 2 Odd-to-Even Field Transition Master/Slave
Figure 29. Timing Mode 2 Even-to-Odd Field Transition Master/Slave
ODD FIELD
625
312
(NTSC) and
313
1
Figure 30
NTSC = 122 × CLOCK/2
PAL = 132 × CLOCK/2
314
2
Figure 28. Timing Mode 2 (PAL)
Figure 28
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315
3
ODD FIELD
shows the
VERTICAL BLANK
VERTICAL BLANK
EVEN FIELD
316
4
NTSC = 122 × CLOCK/2
(PAL).
PAL = 132 × CLOCK/2
NTSC = 858 × CLOCK/2
PAL = 864 × CLOCK/2
317
5
HSYNC, BLANK, and VSYNC for an odd-to-even field
Cb
Figure 29
318
6
Y
319
shows the
Cr
7
Y
320
HSYNC, BLANK, and VSYNC for an
Cb
21
Cb
Y
22
334
Cr
DISPLAY
23
335
Y
DISPLAY
336