5962-9201301MEA Analog Devices Inc, 5962-9201301MEA Datasheet - Page 7

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5962-9201301MEA

Manufacturer Part Number
5962-9201301MEA
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of 5962-9201301MEA

Power Supply Requirement
Dual
Single Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Mounting
Through Hole
Lead Free Status / RoHS Status
Not Compliant

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REV. A
The AD684 does not provide separate analog and digital ground
leads as is the case with most A-to-D converters. The common
pin is the single ground terminal for the device. It is the refer-
ence point for the sampled input voltage and the held output
voltage and also the digital ground return path. The common
pin should be connected to the reference (analog) ground of the
A-to-D converter with a separate ground lead. Since the analog
and digital grounds in the 684 are connected internally, the
common pin should also be connected to the digital ground,
which is usually tied to analog common at the A-to-D converter.
Figure 4 illustrates the recommended decoupling and grounding
practice.
NOISE CHARACTERISTICS
Designers of data conversion circuits must also consider the
effect of noise sources on the accuracy for the data acquisition
system. A sample-and-hold amplifier that precedes the A-to-D
converter introduces some noise and represents another source
of uncertainty in the conversion process. The noise from the
AD684 is specified as the total output noise, which includes
both the sampled wideband noise of the SHA in addition to the
band limited output noise. The total output noise is the rms
sum of the sampled dc uncertainty and the hold mode noise. A
plot of the total output noise vs. the equivalent input bandwidth
of the converter being used is given in Figure 5.
DRIVING THE ANALOG INPUTS
For best performance, it is important to drive the AD684 analog
inputs from a low impedance signal source. This enhances the
sampling accuracy by minimizing the analog and digital
crosstalk. Signals which come from higher impedance sources
(e.g., over 5k ohms) will have a relatively higher level of
crosstalk. For applications where signals have high source
impedance, an operational amplifier buffer in front of the
AD684 is required. The AD713 (precision quad BiFET op
amp) is recommended for these applications.
HIGH FREQUENCY SAMPLING
Aperture jitter and distortion are the primary factors which limit
frequency domain performance of a sample-and-hold amplifier.
Aperture jitter modulates the phase of the hold command and
produces an effective noise on the sampled analog input. The
magnitude of the jitter induced noise is directly related to the
frequency of the input signal.
Figure 5. RMS Noise vs. Input Bandwidth of ADC
–7–
A graph showing the magnitude of the jitter induced error vs.
frequency of the input signal is given in Figure 6.
The accuracy in sampling high frequency signals is also con-
strained by the distortion and noise created by the sample-and-
hold. The level of distortion increases with frequency and
reduces the “effective number of bits” of the conversion.
Measurements of Figures 7 and 8 were made using a 14-bit
A-to-D converter with V
of 100 kSPS.
Figure 8. Signal/(Noise and Distortion) vs. Frequency
Figure 7. Total Harmonic Distortion vs. Frequency
Figure 6. Error Magnitude vs. Frequency
IN
= 10 V p-p and a sample frequency
AD684

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