5962-8752902LA QP SEMICONDUCTOR, 5962-8752902LA Datasheet - Page 6

• Manufacturer Part Number: 5962-8752902LA
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-8752902LA

• Organization: 2Kx8
• Interface Type: Parallel
• In System Programmable: In System/External
• Access Time (max): 35ns
• Package Type: CDIP
• Reprogramming Technique: UV
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 120mA
• Pin Count: 24
• Mounting: Through Hole
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Lead Free Status / RoHS Status: Not Compliant

DSCC FORM 2234
APR 97
1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where the entire SMD PIN number is not
feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535,
appendix A and the requirements herein.
each lot of microcircuits delivered to this drawing.
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
manufacturer prior to delivery.
specified by the manufacturer.
procedures and characteristics specified by the manufacturer.
specified program, or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that
all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be
removed from the lot.
be done for initial characterization and after any design or process change which may affect data retention. The methods and
procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military
temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of
the acquiring or preparing activity, along with test data.
done for initial characterization and after any design or process change which may affect the reprogrammability of the device.
The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed
in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and
shall be made available upon request of the acquiring or preparing activity, along with test data.
prior to quality conformance inspection. The following additional criteria shall apply:
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.
3.9 Verification and review. DSCC, DSCC's agent and the acquiring activity retain the option to review the manufacturer's
3.10 Processing EPROMS. All testing requirements and quality assurance provisions herein, shall be satisfied by the
3.10.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics
3.10.2 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the
3.10.3 Verification of programmed or erased EPROMs. When specified, devices shall be verified as either programmed to a
3.11 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall
3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This test shall be
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
DEFENSE SUPPLY CENTER COLUMBUS
a. Burn-in test (method 1015 of MIL-STD-883).
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
(1)
(2)
tests prior to burn-in are optional at the discretion of the manufacturer.
COLUMBUS, OHIO 43218-3990
MICROCIRCUIT DRAWING
Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or procuring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
T
A
= +125 ° C, minimum.
STANDARD
SIZE
A
REVISION LEVEL
E
SHEET
5962-87529
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