RC28F640J3F75A NUMONYX, RC28F640J3F75A Datasheet - Page 23

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RC28F640J3F75A

Manufacturer Part Number
RC28F640J3F75A
Description
Manufacturer
NUMONYX
Datasheet

Specifications of RC28F640J3F75A

Lead Free Status / RoHS Status
Not Compliant

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7.0
Figure 7:
Table 10: Timing Signal Name Decoder
Note:
March 2010
208032-02
Address
Data - Read
Data - Write
Chip Enable (CE)
Output Enable (OE#)
Write Enable (WE#)
Status (STS)
Reset (RP#)
Byte Enable (BYTE#)
Erase/Program/Block Lock
Enable (V
®
PEN
Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
)
Signal
Timing Signal Naming Convention
AC Characteristics
Timing symbols used in the timing diagrams within this document conform to the
following convention.
Exceptions to this convention include t
refers to the aggregate initial-access delay as determined by t
(whichever is satisfied last) of the flash device. t
data sheet, and is the address-to-data delay for subsequent page-mode reads.
Source Signal
Source State
A
Q
E
G
W
R
P
F
V
D
t
Code
E
L Q V
High
Low
High-Z
Low-Z
Valid
Invalid
ACC
and t
APA
APA
State
Target State
Target Signal
. t
ACC
is specified in the flash device’s
is a generic timing symbol that
AVQV
, t
H
L
Z
X
V
I
ELQV
, and t
Code
GLQV
Datasheet
23

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