AT88SC0404C-PI Atmel, AT88SC0404C-PI Datasheet - Page 26

• Manufacturer Part Number: AT88SC0404C-PI
• Manufacturer: Atmel

Specifications of AT88SC0404C-PI

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: PDIP
• Mounting: Through Hole
• Pin Count: 8
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Not Compliant

6.
6.1.
6.2.
5211C–SMIC–01/10
Atmel AT88SC0104/0204/0404/0808/1616/3216/6416/12816/25616C
Protocol Selection
Atmel
communication for embedded applications and an ISO 7816 asynchronous T=0 smart card interface. The power-up
sequence of CryptoMemory determines what mode it shall operate in. A brief description of each of these modes
follows.
Synchronous Mode for Embedded Applications
The 2-wire serial interface is used for fast and efficient communication with logic and controllers. The synchronous
mode is the default after powering up V
applications using CryptoMemory in standard plastic packages RST is not bonded out and this is the only
communication protocol.
Power-up V
After stable V
CLK-SCL and I/O-SDA may then be driven.
Figure 7. Asynchronous Mode
CLK-SCL
The asynchronous mode is selected when RST is low on a rising edge of CLK. Once the asynchronous mode has been
selected, it is not possible to return to the synchronous mode other than by powering the device off and on again.
Asynchronous Mode for Smart Card Applications
The asynchronous T=0 protocol defined by ISO 7816-3 is used for compatibility with the industry standard smart card
readers. Selecting this mode requires the following power-up sequence, which complies with ISO 7816-3 for a cold
reset in smart card applications.
• Power up V
• Set I/O-SDA in receive mode
• Provide a clock signal to CLK-SCL
• RST goes high after 400 clock cycles
The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory density within the
CryptoMemory family.
The 64-bit ATR code comes from a register that contains the characters shown in
on page 26. The historical bytes (T1, T2, T3) show the density of the CryptoMemory device. This register may be
modified during personalization but is locked when the PER fuse is blown. Care must be taken to respect the
applicable standards defining the ATR value if operating in asynchronous mode. The CryptoMemory device will always
output all 8-bytes in response to the asynchronous ATR command regardless of the contents of the register.
I/O-SDA
RST
®
V cc
CryptoMemory
CC
CC
, RST goes high also.
CC
, apply 5 pulses CLK-SCL
; RST, IO-SDA and CLK-SCL are low
®
supports two application areas with different communication protocols: a 2-wire serial
1
2
3
CC
due to the internal and/or external pull-up on RST. For embedded
4
5
Table 23
on page
26
and
Table 24
25