STK14CA8-N45I Cypress Semiconductor Corp, STK14CA8-N45I Datasheet - Page 7

• Manufacturer Part Number: STK14CA8-N45I
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK14CA8-N45I

• Word Size: 8b
• Organization: 128Kx8
• Density: 1Mb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: -40C to 85C
• Pin Count: 32
• Mounting: Surface Mount
• Supply Current: 55mA
• Lead Free Status / RoHS Status: Not Compliant

SRAM WRITE Cycles #1 and #2
Document Number: 001-51592 Rev. *C
Notes
NO.
8. If W is low when E goes low, the outputs remain in the high impedance state.
9.
12
13
14
15
16
17
18
19
20
21
E or W must be ≥ V
t
t
t
t
t
t
t
t
t
t
AVAV
WLWH
ELWH
DVWH
WHDX
AVWH
AVWL
WHAX
WLQZ
WHQX
#1
ADDRESS
DATA OUT
DATA IN
DATA IN
[6,8]
ADDRESS
DATA OUT
DATA IN
Symbols
W
E
t
t
t
t
t
t
t
t
AVAV
WLEH
ELEH
DVEH
EHDX
AVEH
AVEL
EHAX
IH
W
E
during address transitions.
#2
t
AVWL
18
Alt.
t
t
t
t
t
t
t
t
t
t
WC
CW
DW
WR
OW
WP
AW
WZ
DH
AS
t
AVEL
18
PREVIOUS DATA
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Setup to End of Write
Data Hold after End of Write
Address Setup to End of Write
Address Setup to Start of Write
Address Hold after End of Write
Write Enable to Output Disable
Output Active after End of Write
Figure 8. SRAM WRITE Cycle #1: W Controlled
Figure 9. SRAM WRITE Cycle #2: E Controlled
Parameter
t
WLQZ
20
t
AVEH
17
t
AVWH
17
t
WLWH
t
13
ELWH
14
t
AVAV
12
t
ELEH
t
WLEH
14
t
13
AVAV
HIGH IMPEDANCE
12
HIGH IMPEDANCE
t
t
STK14CA8-25
DVWH
DVEH
15
15
Min
25
20
20
10
20
0
0
0
3
DATA VALID
DATA VALID
Max
10
[1]
t
t
WHDX
WHAX
STK14CA8-35
19
16
Min
t
EHDX
35
25
25
12
25
[8,9]
t
16
0
[8,9]
EHAX
0
0
3
19
t
WHQX
21
Max
13
STK14CA8-45
Min
45
30
30
15
30
0
0
0
3
STK14CA8
Max
15
Page 7 of 17
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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