USB2228-NU-09 Standard Microsystems (SMSC), USB2228-NU-09 Datasheet - Page 15

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USB2228-NU-09

Manufacturer Part Number
USB2228-NU-09
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of USB2228-NU-09

Lead Free Status / RoHS Status
Compliant

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Revision 1.93 (11-01-07)
SEL_CLKDRV
SYMBOL
MA[15:3]
MA2/
128-PIN
VTQFP
128
127
126
125
124
123
122
121
120
119
118
4
2
1
BUFFER
I/O8PD
TYPE
O8
4th Generation USB 2.0 Flash Media Controller with Integrated Card Power FETs
DATASHEET
Memory Address Bus:
These signals address memory locations within the external
memory.
Memory Address Bus:
MA2 Addresses memory locations within the external memory.
SEL_CLKDRV. During nRESET assertion, this pins will select
the operating clock mode (crystal or externally driven clock
source), and a weak pull-down resistor is enabled. When
nRESET is negated, the value will be internally latched and this
pin will revert to MA2 functionality, the internal pull-down will be
disabled.
‘0’ = Crystal operation (24MHz only)
‘1’ = Externally driven clock source (24MHz or 48MHz)
Note:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
If the latched value is ‘0’, then the MA2 pin will function
identically to the MA[15:3] pins at all times (other than during
nRESET assertion).
15
If the latched value is ‘1’, then the MA2 pin is tri-stated
when the following conditions are true:
DESCRIPTION
SMSC USB2227/USB2228
Datasheet

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