ATF16V8BQ-10PC Atmel, ATF16V8BQ-10PC Datasheet - Page 9

EEPLD - Electronically Erasable Programmable Logic Devices 250 GATE QRTR PWR- 10NS QTR PWR

ATF16V8BQ-10PC

Manufacturer Part Number
ATF16V8BQ-10PC
Description
EEPLD - Electronically Erasable Programmable Logic Devices 250 GATE QRTR PWR- 10NS QTR PWR
Manufacturer
Atmel
Datasheet

Specifications of ATF16V8BQ-10PC

Family Name
ATF16V8BQ
Process Technology
CMOS
# Macrocells
8
# I/os (max)
8
Frequency (max)
83MHz
Propagation Delay Time
10ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
20
Supply Current
40mA
Delay Time
10 ns
Logic Family
ATF16V8BQ
Maximum Operating Frequency
83 MHz
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Number Of Macrocells
8
Number Of Product Terms Per Macro
8
Number Of Programmable I/os
8
Operating Supply Voltage
5 V
Package / Case
PDIP-20
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Lead Free Status / RoHS Status
Not Compliant
10. Software Support
11. Macrocell Configuration
0364J–PLD–7/05
in the following pages. The user can download the listed subset device JEDEC programming file
to the PLD programmer, and the ATF16V8B can be configured to act like the chosen device.
Check with your programmer manufacturer for this capability.
Unused product terms are automatically disabled by the compiler to decrease power consump-
tion. A security fuse, when programmed, protects the content of the ATF16V8B. Eight bytes (64
fuses) of User Signature are accessible to the user for purposes such as storing project name,
part number, revision, or date. The User Signature is accessible regardless of the state of the
security fuse.
Atmel-WinCUPL is a free tool, available on Atmel’s web site and can be used to design in all
members of the Atmel ATF16V8B family of SPLDs.
appropriate device mnemonics
Table 10-1.
Note:
Software compilers support the three different OMC modes as different device types. Most com-
pilers have the ability to automatically select the device type, generally based on the register
usage and output enable (OE) usage. Register usage on the device forces the software to
choose the registered mode. All combinatorial outputs with OE controlled by the product term
will force the software to choose the complex mode. The software will choose the simple mode
only when all outputs are dedicated combinatorial without OE control. The different device types
can be used to override the automatic device selection by the software. For further details, refer
to the compiler software manuals.
When using compiler software to configure the device, the user must pay special attention to the
following restrictions in each mode.
In registered mode pin 1 and pin 11 are permanently configured as clock and output enable,
respectively. These pins cannot be configured as dedicated inputs in the registered mode.
In complex mode pin 1 and pin 11 become dedicated inputs and use the feedback paths of pin
19 and pin 12 respectively. Because of this feedback path usage, pin 19 and pin 12 do not have
the feedback option in this mode.
In simple mode all feedback paths of the output pins are routed via the adjacent pins. In doing
so, the two inner most pins (pins 15 and 16) will not have the feedback option as these pins are
always configured as dedicated combinatorial output.
ABEL, Atmel-ABEL
CUPL, Atmel-WinCUPL
LOG/iC
OrCAD-PLD
PLDesigner
Tango-PLD
1. Only applicable for version 3.4 or lower.
Compiler Mode Selection
Registered
P16V8R
G16V8MS
GAL16V8_R
“Registered”
P16V8R
G16V8R
(1)
Complex
P16V8C
G16V8MA
GAL16V8_C7
“Complex”
P16V8C
G16V8C
Table 10-1
ATF16V8B/BQ/BQL
(1)
lists popular compilers with the
“Simple”
Simple
P16V8AS
G16V8AS
GAL16V8_C8
P16V8C
G16V8AS
(1)
Auto Select
P16V8
G16V8
GAL16V8
GAL16V8A
P16V8A
G16V8
9

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