9110-01CS14LF IDT, Integrated Device Technology Inc, 9110-01CS14LF Datasheet
9110-01CS14LF
Specifications of 9110-01CS14LF
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9110-01CS14LF Summary of contents
Page 1
... Very low jitter • Wide operating range VCO Applications Graphics: The AV9110 generates low jitter, high speed pixel (or dot) clocks. It can be used to replace multiple expensive high speed crystal oscillators. The flexibility of this device allows it to generate nonstandard graphics clocks, allowing the user to program frequencies on-the-fly. ...
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... X 2 Clock Reference Implementations: AV9110-01 vs. AV9110-02 The AV9110 requires a stable reference clock ( MHz) to generate a stable, low jitter output clock. The AV9 11 0 -01 is optimized to use an external quartz crystal as a frequency reference, without the need of additional external components. The AV9110-02 is optimized to accept an TTL clock reference ...
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... Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Electrical Characteristics ° +5V±10 – unless otherwise stated Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production AV9110 +0 ± ± µ A µ ...
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... AV9110 Serial Programming The AV9110 is programmed to generate clock frequencies by entering data through the shift register. Figure 1 displays the proper timing sequence. On the negative going edge of CE#, the shift register is enabled and the data at the DATA pin is loaded into the shift register on the rising edge of the SCLK. ...
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... Output Divider Turth Tables Table Programming the PLL The AV9110 has a wide operating range but it is recommended that it is operated within the following limits < f < REF < < < f < < The AV9110 is a classical PLL circuit and the VCO output frequency is given by: N• ...
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... Refer to Recommended Board Layout diagram on page 8. Output Enable The AV9110 outputs can be disabled with either the OE pin or through serial programming. Setting the OE pin low tristates CLK and CLK/X. Alternatively, setting bits D19 and D20 low in the serial word will tristate the two outputs. Both the OE pin and D19 or D20 must be high to enable an output ...
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... AV9110 Quartz Crystal Selection When an external quartz crystal will be used as a frequency reference for the AV9110, attention needs to be given to crystal selection if accurate reference frequency and output frequency is desired. The AV9110 uses a Pierce oscillator design which operates the quartz crystal in parallel-resonant mode ...
Page 8
... Use of the isolated ground plane and power connection, as shown, will prevent stray high frequency ground and system noise from coupling to the AV9110. As when compared to using the system ground and power planes, this technique will lessen output clock jitter. The isolated ground plane should be connected to the system ground plane at one point near the 2.2mF decoupling cap ...
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... AV9110 Typical Duty Cycle VCO Output Divide Duty Cycle will improve if R > 1 MHz AV9110 Idd MHz 9 AV9110 ...
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... AV9110 14-Pin 150 mil SOIC Package Ordering Information AV9110-01CN14LF, AV9110-02CN14LF AV9110-01CS14LF, AV9110-02CS14LF Example: ICS XXXX S-PPP X#W LF 14-Pin DIP Package Lead Free, RoHS Compliant (Optional) Lead Count Lead Count=1 digits Pattern Number digit number for parts with ROM code patterns) Package Type ...
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... Revision History Rev. Issue Date Description G 3/19/2008 added LF ordering Information. 11 AV9110 Page # 10 ...