LTC6994CDCB-1#PBF Linear Technology, LTC6994CDCB-1#PBF Datasheet - Page 15

• Manufacturer Part Number: LTC6994CDCB-1#PBF
• Manufacturer: Linear Technology

Specifications of LTC6994CDCB-1#PBF

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 6
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

operaTion
Changing DIVCODE After Start-Up
Following start-up, the A/D converter will continue
monitoring V
be recognized slowly, as the LTC6994 places a priority on
eliminating any “wandering” in the DIVCODE. The typical
delay depends on the difference between the old and
new DIVCODE settings and is proportional to the master
oscillator period.
A change in DIVCODE will not be recognized until it is stable,
and will not pass through intermediate codes. A digital filter
is used to guarantee the DIVCODE has settled to a new
value before making changes to the output. However, if
the delay timing is active during the transition, the actual
delay can take on a value between the two settings.
t
500mV/DIV
500mV/DIV
DIVCODE
2V/DIV
2V/DIV
2V/DIV
2V/DIV
OUT
OUT
DIV
DIV
IN
IN
LTC6994-1
V
R
LTC6994-1
V
R
Figure 7a. DIVCODE Change from 0 to 2
Figure 7b. DIVCODE Change from 2 to 0
= 16 • (∆DIVCODE + 6) • t
+
SET
+
SET
= 3.3V
= 3.3V
DIV
256µs
= 200k
= 200k
4µs
for changes. Changes to DIVCODE will
512µs
500µs/DIV
500µs/DIV
512µs
256µs
4µs
MASTER
699412 F07a
699412 F07b
Start-Up Time
When power is first applied, the power-on reset (POR)
circuit will initiate the start-up time, t
is held low during this time and the IN pin has no control
over the output. The typical value for t
0.5ms to 8ms depending on the master oscillator frequency
(independent of N
During start-up, the DIV pin A/D converter must deter-
mine the correct DIVCODE before an output pulse can be
generated. The start-up time may increase if the supply
or DIV pin voltages are not stable. For this reason, it is
recommended to minimize the capacitance on the DIV
pin so it will properly track V
extend the start-up time.
At the end of t
recognized, and the state of the IN pin is transferred to
the output (without additional delay). If IN is high at the
end of t
low. The LTC6994-2 is the exception because it inverts the
signal. At this point, the LTC6994 is ready to respond to
rising/falling edges on the input.
t
START(TYP)
OUT
V
IN
START
+
*LTC6994-2 WITH POL = 1 INVERTS THE OUTPUT
, OUT will go high. Otherwise OUT will remain
LTC6994-1/LTC6994-2
Figure 8. Start-Up Timing Diagram
= 500 • t
START
(IN IGNORED)
t
DIV
START
the DIVCODE and IN pin settings are
):
MASTER
+
t
PD
. Less than 100pF will not
IF N = 1 AT END OF t
IF N = 0 AT END OF t
START
START
. The OUT pin
START
START
ranges from
699412 F08
*
*

699412p