PI74SSTVF16859AZBX Pericom Semiconductor, PI74SSTVF16859AZBX Datasheet

PI74SSTVF16859AZBX

Manufacturer Part Number

PI74SSTVF16859AZBX

Description

Manufacturer

Pericom Semiconductor

Datasheet

1.PI74SSTVF16859AZBX.pdf (8 pages)

Specifications of PI74SSTVF16859AZBX

Logic Family

SSTV

Logical Function

Registered Buffer

Number Of Elements

Number Of Bits

Number Of Inputs

Number Of Outputs

High Level Output Current

-16mA

Low Level Output Current

16mA

Propagation Delay Time

5ns

Operating Supply Voltage (typ)

2.5V

Operating Supply Voltage (max)

2.7V

Operating Supply Voltage (min)

2.3V

Clock-edge Trigger Type

Posit/Negat-Edge

Polarity

Non-Inverting

Technology

CMOS

Frequency (max)

210(Min)MHz

Mounting

Surface Mount

Pin Count

Operating Temp Range

0C to 70C

Operating Temperature Classification

Commercial

Lead Free Status / RoHS Status

Not Compliant

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Product Features

• PI74 SSTVF16859A is designed for low-voltage operation,

• Supports SSTL_2 Class I specifications on outputs

• All Inputs are SSTL_2 Compatible, except RESET

• Designed for DDR Memory

• Flow-Through Architecture

• Package: 56-pin, Plastic Very Thin Fine Pitch Quad Flat No-

Logic Block Diagram

Truth Table

Notes:

1. H = High Signal Level

2.5V for PC1600 ~ PC2700; 2.6V for PC3200

which is LVCMOS.

Lead QFN (ZB). (Pb-free available)

RESET

L = Low Signal Level

↑ = Transition LOW-to-HIGH

↓ = Transition HIGH-to-LOW

X = Irrelevant or floating

CLK

REF

06-0288

(1)

o l

r o

i t a

↑

TO 12 OTHER CHANNELS

r o

g n

n I

s t

o l

r o

i t a

↓

r o

g n

2. Output level before the

CLK

indicated steady state

input conditions were

established.

o l

i t a

r o

g n

p t

Q1A

Q1B

(

) 2

s t

Product Description

Pericom Semiconductor’s PI74SSTVF16859A logic circuit is

produced using the Company’s advanced sub-micron CMOS

technology, achieving industry leading speed.

All inputs are compatible with the JEDEC standard for SSTL_2,

except the LVCMOS reset (RESET) input. All outputs are SSTL_2,

Class II compatible.

The device operates from a differential clock (CLK and CLK). Data

registered at the crossing of CLK going HIGH, and CLK going LOW.

The PI74SSTVF16859A supports low-power standby operation.

When RESET is LOW, the differential input receivers are disabled,

and undriven (floating) data, clock and reference voltage (V

inputs are allowed. In addition, when RESET is LOW, all registers are

reset, and all outputs are forced LOW. The LVCMOS RESET input

must always be held at a valid logic HIGH or LOW level.

To ensure defined outputs from the register before a stable clock

has been supplied, RESET must be held in the LOW state during

power up.

In the DDR DIMM application, RESET is specified to be completely

asynchronous with respect to CLK and CLK. Therefore, no timing

relationship can be guaranteed between the two. When entering

RESET, the register will be cleared and the outputs will be driven

LOW quickly, relative to the time to disable the differential input

receivers, thus ensuring no glitches on the output. However, when

coming out of RESET, the register will become active quickly, relative

to the time to enable the differential input receivers. When the data

inputs are LOW, and the clock is stable, during the time from the

LOW-to-HIGH transition of RESET until the input receivers

are fully enabled, the design must ensure that the outputs will

remain LOW.

Pericom’s PI74SSTVF16859A is characterized for operation from

0°C to 70°C.

Product Pin Description

n i

13-Bit to 26-Bit Registered Buffer

r G

p n

s e

o l

u o

a t

e r

p t

t u

k c

t e

d n

t u

A (

p n

p p

p t

r e f

, t u

i t c

, t u

p p

, t u

y l

e v

n e

PI74SSTVF16859A

y l

e c

- 1

s o

g e

- 1

a t l

i t i

) w

i t a

3 1

a t l

e g

e v

c s

a t l

e v

3 1

e g

i r

e g

t p

f i

r e f

f i

o i

r e f

PS8684B

n e

a i t

I l

p n

t u

10/30/06

REF

)

Related parts for PI74SSTVF16859AZBX

PI74SSTVF16859AZBX Summary of contents

Page 1

... Transition HIGH-to-LOW X = Irrelevant or floating 06-0288 Product Description Pericom Semiconductor’s PI74SSTVF16859A logic circuit is produced using the Company’s advanced sub-micron CMOS technology, achieving industry leading speed. All inputs are compatible with the JEDEC standard for SSTL_2, except the LVCMOS reset (RESET) input. All outputs are SSTL_2, Class II compatible ...

Page 2

Pin Configuration Q7A 1 Q6A 2 Q5A 3 Q4A 4 Q3A 5 56-Pin Q2A 6 ZB Q1A 7 Q13B DDQ Q12B 10 Q11B ...

Page 3

Recommended Operating Conditions ...

Page 4

DC Electrical Characteristics for PC1600 ~ PC2700 (Over the Operating Range 0°C to +70° ...

Page 5

DC Electrical Characteristics for PC3200 (Over the Operating Range 0°C to +70° ...

Page 6

Timing Requirements (over recommended operating free-air temperature range ...

Page 7

Test Circuit and Switching Waveforms LVCMOS RESET Input t inact I DD (9) 10% Voltage and Current Waveforms Input Active and Inactive Times t w Input V REF Voltage Waveforms - Pulse Duration Timing V ICR Input ...

Page 8

... BSE .019 0.50 0.30 0. .199 .211 5.05 5.35 0.25 Chamfer Pericom Semiconductor Corporation 8 PI74SSTVF16859A 13-Bit to 26-Bit Registered Buffer .007 .012 O 0. 0.18 0.30 .171 .183 4.35 4. ° ° ° ° PS8684B .030 .033 0.76 0.84 .008 REF 0 ...

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