PI74SSTVF16857AA Pericom Semiconductor, PI74SSTVF16857AA Datasheet
PI74SSTVF16857AA
Manufacturer Part Number
PI74SSTVF16857AA
Description
Manufacturer
Pericom Semiconductor
Datasheet
1.PI74SSTVF16857AA.pdf
(8 pages)
Specifications of PI74SSTVF16857AA
Logic Family
SSTV
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
14
Number Of Inputs
14
Number Of Outputs
14
High Level Output Current
-16mA
Low Level Output Current
16mA
Propagation Delay Time
5ns
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
210(Min)MHz
Mounting
Surface Mount
Pin Count
48
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Product Features
• Designed for low-voltage operation,
• Supports SSTL_2 Class I output specifications
• SSTL_2 Input and Output Levels
• Designed for DDR Memory
• Flow-Through Architecture
• Packaging Options (Lead-free packages are available):
Logic Block Diagram
Product Pin Description
Truth Table
Notes:
1. H = High Signal Level
R
2.5V for PC1600 ~ PC2700; 2.6V for PC3200
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 173 mil wide plastic TVSOP (K)
Pin Name
CLK
CLK
D
Q
GND
V
V
V
RESET
E
L = Low Signal Level
↑ = Transition LOW-to-HIGH
↓ = Transition HIGH-to-LOW
X = Irrelevant
RESET
H
Η
H
L
DD
REF
S
DDQ
V
E
CLK
CLK
REF
T
D1
38
39
48
35
L
34
C
(1)
r o
L
X
↑
↑
K
H
n I
Description
Reset (Active Low)
Clock Input
Clock Input
Data Input
Data Output
Ground
Core Supply Voltage
Output Supply Voltage
Input Reference Voltage
p
TO 13 OTHER CHANNELS
u
s t
L
C
r o
L
X
↓
↓
K
H
2. Output level before the
D
X
H
X
L
R
D
indicated steady state
input conditions were
established.
CLK
O
Q
u
p t
Q
H
L
L
o
(
u
) 2
s t
1
Q1
1
Product Description
Pericom Semiconductor’s PI74SSTVF16857A series of logic circuits
are produced using the Company’s advanced sub-micron CMOS
technology, achieving industry leading speed.
The 14-bit PI74SSTVF16857A universal bus driver is designed
for 2.5V to 2.6V V
the RESET input which is LVCMOS.
Data flow from D to Q is controlled by the differential clock , CLK,
CLK and RESET. Data is triggered on the positive edge of CLK.
CLK must be used to maintain noise margins.
RESET must be supported with LVCMOS levels as V
be stable during power-up. RESET is asynchronous and is intended
for power-up only and when low assures that all of the registers reset
to the Low State, Q outputs are low, and all input receivers, data and
clock, are switched off.
Pericom’s PI74SSTVF16857A is characterized for operation from
0° to 70°C.
Product Pin Configuration
V DDQ
V DDQ
V DDQ
V DDQ
V DDQ
GND
GND
GND
GND
GND
Q10
Q11
Q12
Q13
Q14
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
DD
operation and SSTL_2 I/O Levels except for
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
14-Bit Registered Buffer
48-Pin
A, K
PI74SSTVF16857A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
D1
D2
GND
V DD
D3
D4
D5
D6
D7
CLK
CLK
V DD
GND
V REF
RESET
D8
D9
D10
D11
D12
V DD
GND
D13
D14
PS8687A
REF
may not
04/24/08
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PI74SSTVF16857AA Summary of contents
Page 1
... L = Low Signal Level ↑ = Transition LOW-to-HIGH ↓ = Transition HIGH-to-LOW X = Irrelevant Product Description Pericom Semiconductor’s PI74SSTVF16857A series of logic circuits are produced using the Company’s advanced sub-micron CMOS technology, achieving industry leading speed. The 14-bit PI74SSTVF16857A universal bus driver is designed for 2.5V to 2.6V V the RESET input which is LVCMOS ...
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... Pericom Semiconductor Corporation 8 PI74SSTVF16857A 14-Bit Registered Buffer 6.0 6.2 SEATING PLANE .004 .008 0.45 .018 0.75 .030 .002 .006 .319 0.05 BSC 8.1 0.15 4.30 4.50 .0035 .008 0.45 .018 0.75 .030 .252 BSC 6.4 SEATING PLANE Max. .047 1. ...