TS8388BMFS9NB1 E2V, TS8388BMFS9NB1 Datasheet
TS8388BMFS9NB1
Specifications of TS8388BMFS9NB1
TS8388BMFS9NB1 Summary of contents
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ADC 8-bit 1 Gsps TSEV8388B Evaluation Board .............................................................................................. User Guide ...
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... SMA Connectors and Microstrip Lines De-embedding Fixture .................4-2 4.7 Temperature Monitoring and Data Ready Reset Function........................4-3 4.7.1 TS8388B ADC Diode Junction Temperature Measurement Setup ....4-3 4.8 Data Ready Output Signal Reset ..............................................................4-4 4.9 Test Bench Description .............................................................................4-5 i 0973D–BDC–02/09 e2v semiconductors SAS 2009 ...
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... Table of Contents Section 5 Package Description............................................................................. 5-1 Section 6 Schematics ........................................................................................... 6-1 ii 0973D–BDC–02/09 e2v semiconductors SAS 2009 5.1 TS8388BGL Pinout ...................................................................................5-1 5.2 TS8388BF/TS8388BFS Pinout .................................................................5-3 5.3 CBGA68 Thermal Characteristics .............................................................5-5 5.3.1 Thermal Resistance from Junction to Ambient: Rthja ........................5-5 5.3.2 Thermal Resistance from Junction to Case: Rthjc .............................5-5 5 ...
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... The board set comes fully assembled and tested, with the TS8388B installed and heatsink. The 8-bit 1 Gsps ADC evaluation board is fully compatible with its companion device evaluation board (TSEV81102G0 DMUX). TSEV8388B - Evaluation Board User Guide Section 1 Overview 1-1 0973D–BDC–02/09 e2v semiconductors SAS 2009 ...
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... Gray or Binary Output Data Select GORB (Deembedding fixture) CAL1 CAL2 CAL3 typ CAL4 +5V VCC -5V VEEA GND -5V VEED 1-2 0973D–BDC–02/09 e2v semiconductors SAS 2009 CLK CLKB TS8388B DR/DRB D0/D0B D7/D7B VIN OR/ORB VINB VCC GAIN/GND GND VCC VPLUSD GORB AVEE DVEE ...
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Board Mechanical Characteristics TSEV8388B - Evaluation Board User Guide The board layer’s number, thickness, and functions are given below, from top to bottom. Table 1-1. Board Layers Thickness Profile Layer Characteristics Layer 1 Copper thickness = 35 µm Copper ...
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... Settings Accesses A potentiometer is provided for ADC gain adjust. 1-4 0973D–BDC–02/09 e2v semiconductors SAS 2009 Higher operating temperature value: 170°C (125°C for FR4). Better with standing of thermal shocks (–65° 170°C ...
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... DC Functions The DC signals traces are low impedance. Settings They have been routed with 50Ω impedance near the device because of room restriction. TSEV8388B - Evaluation Board User Guide Section 2 Layout Information 0973D–BDC–02/09 e2v semiconductors SAS 2009 2-1 ...
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... Surface-mount resistors and chip capacitors allow the closest possible connections to the device pins, for microstrip line back termination and bypassing. board Implementation 2-2 0973D–BDC–02/09 e2v semiconductors SAS 2009 , PLUSD The decoupling capacitors are superposed. In this configuration, the 100 pF capacitors must be mounted first ...
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... Clock frequency can range between 10 MHz and 1.4 Gsps. Section 3 Characteristics = V = –5V) through the dedicated EAE EED EED 0973D–BDC–02/09 e2v semiconductors SAS 2009 3-1 ...
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... In case only one supply is used for supplying the 3-2 0973D–BDC–02/09 e2v semiconductors SAS 2009 . The inverted phase clock input V IN open (as on-board 50Ω terminated). Use a low phase noise RF source. Full Scale range is 0.5V peak to peak around 0V, (±250 mV), or –2 dBm into 50Ω. ...
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Operating Charcteristics Table 3-2. Electrical Operating Characteristics Parameter Positive supply voltage (dedicated to TS8388B ADC only) Positive supply current Positive supply voltage not used by default – If installed (dedicated to MC100EL16 differential Receivers) Positive supply current not used ...
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... Operating Procedures and Characteristics 3-4 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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... Application Information (See Section 3). IN the data format selected will be natural binary, if this input ST2 is left floating or tied the data output format is true Binary ST2 is tied to GND, the data outputs are in Gray format. Section 4 4-1 0973D–BDC–02/09 e2v semiconductors SAS 2009 ...
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... Impedance mismatch will cause ripple in the S21 parameter as a function of both the degree of mismatch and the length of the line. 4-2 0973D–BDC–02/09 e2v semiconductors SAS 2009 positive supply voltage allows the adjustment of the output common mode PLUSD = 0V for ECL output compatibility) to +1.2V (V PLUSD = 0V (respectively 2 ...
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Temperature Monitoring and Data Ready Reset Function 4.7.1 TS8388B ADC Diode Junction Temperature Measurement Setup TSEV8388B - Evaluation Board User Guide One single pad is used for both DRRB input command and die junction monitoring. The pad denomination is ...
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... The Data ready output signal restarts on DRRB command rising edge, ECL logical high levels (-0.8V). DRRB may also be grounded allowed to float, for normal free running Data ready output signal. 4-4 0973D–BDC–02/09 e2v semiconductors SAS 2009 1000 960 920 880 840 ...
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Test Bench Description TSEV8388B - Evaluation Board User Guide Figure 4-4. Differential Analog and Clock Inputs Configuration RF Generator - 121 dBc/ KHz offset from fc RF Generator - 117 dBc/ KHz offset from fc ...
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... Application Information 4-6 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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... VEE GND CLK CLKB GND GND VEE BOTTOM VIEW Section VPLUSD NC B5b VPLUSD GND B6b B6 B7b B7 ORb OR VCC GAIN VCC GND GND GND VINB GND VIN VCC VEE GND GND VCC VEE Diode 0973D–BDC–02/09 e2v semiconductors SAS 2009 5-1 ...
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... If the subsequent LVDS circuitry can withstand a lower level for input common mode recommended to lower the positive digital supply level in the same proportion in order to spare power dissipation. 5-2 0973D–BDC–02/09 e2v semiconductors SAS 2009 Function Ground pins connected to external ground plane. ...
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TS8388BF/ TS8388BFS Pinout Figure 5-2. TS8388BF/TS8388BFS Pinout of CQFP68 Package VPLUSD D2B D1B D0B 25 GORB VCC 26 27 GND 28 ...
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... If the subsequent LVDS circuitry can withstand a lower level for input common mode recommended to lower the positive digital supply level in the same proportion in order to spare power dissipation. 5-4 0973D–BDC–02/09 e2v semiconductors SAS 2009 Function Ground pins connected to external ground plane. ...
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CBGA68 Thermal Characteristics 5.3.1 Thermal Resistance from Junction to Ambient: Rthja Table 5-3. Thermal Resistance Estimated ja Thermal Air Flow (m/s) Resistance ( 0 0.5 1 1 5.3.2 Thermal Resistance from Junction to Case: ...
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... Figure 5-5. Thermal Resistance from Junction to Ambient: Rthja 5.4.2 Thermal Resistance Typical value for Rthjc is given to 4.75°C/W. from Junction to Case: Rthjc 5-6 0973D–BDC–02/09 e2v semiconductors SAS 2009 ja Thermal Resistance ( Air Flow (m/s) Estimated – Without Heatsink 0 50 0.5 40 ...
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CBGA68 Board Assembly with External Heatsink Figure 5-6. CQFP68 Board Assembly with External Heatsink Printed circuit Aluminum heatsink Interface: Af-filled epoxy or thermal conductive grease - 100 μm max. TSEV8388B - Evaluation ...
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... Cooling system efficiency can be monitored using the Temperature Sensing Diode, inte- grated in the device. 5-8 0973D–BDC–02/09 e2v semiconductors SAS 2009 A CuW heatspreader has been added at the bottom of the package. The die has been electrically isolated with the ALN substrate. Printed CuW heatspreader 28 ...
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... Part Number Package TS8388BVF CQFP 68 TS8388BMF CQFP 68 TS8388BMF B/Q CQFP 68 TS8388BMFS CQFP 68 with heatspreader TS8388BMFS B/Q CQFP 68 with heatspreader TS8388BMFS9NB1 CQFP 68 with heatspreader TS8388BCGL CBGA 68 TS8388BVGL CBGA 68 TSEV8388BF CQFP68 TSEV8388BGL CBGA 68 TSEV8388B - Evaluation Board User Guide Temperature Range Screening Level “V” grade: – ...
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... Package Description 5-10 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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... TSEV8388B Please refer to figure 6.1 below. Electrical Schematics TSEV8388B - Evaluation Board User Guide Section 6 Schematics 6-1 0973D–BDC–02/09 e2v semiconductors SAS 2009 ...
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... Schematics Figure 6-1. TSEV8388B Electrical Schematic 6-2 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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Figure 6-2. Board Digital Outputs Default Option D0 → D7, OR INb D0B → D7B, ORB, DRB Figure 6-3. Board Digital Outputs Option Using MC100EL16 Differential Receivers D0 → D7, OR INb D0B → D7B, ORB, ...
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... Schematics 6.2 Evaluation Board Schematics 6.2.1 CBGA68 Option Figure 6-4. Component Side Description Figure 6-5. Ground Plane 6-4 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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TSEV8388B - Evaluation Board User Guide Figure 6-6. Power Supplies Planes Figure 6-7. TSEV8388B Evaluation Board: Component Placement Schematics 6-5 0973D–BDC–02/09 ...
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... Schematics 6.2.2 CQFP68 Option Figure 6-8. Component Side Description Figure 6-9. Ground Plane 6-6 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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TSEV8388B - Evaluation Board User Guide Figure 6-10. Power Supplies Planes Figure 6-11. TSEV8388B Evaluation Board: Component Placement Schematics 6-7 0973D–BDC–02/09 ...
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... Schematics 6-8 0973D–BDC–02/09 e2v semiconductors SAS 2009 TSEV8388B - Evaluation Board User Guide ...
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... Whilst e2v has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof and also reserves the right to change the specification of goods without notice. e2v accepts no liability beyond that set out in its standard conditions of sale in respect of infringement of third party patents arising from the use of tubes or other devices in accordance with information contained herein ...