AD8312-EVALZ Analog Devices Inc, AD8312-EVALZ Datasheet
AD8312-EVALZ
Specifications of AD8312-EVALZ
AD8312-EVALZ Summary of contents
Page 1
... A capacitor may be connected between the VOUT and CFLT pins when it is desirable to increase the time interval over which averaging of the input waveform occurs. The AD8312 is available in a 6-ball, 1.0 mm × 1.5 mm, wafer- level chip scale package and consumes 4.2 mA from a 2 5.5 V supply. ...
Page 2
... AD8312 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 General Description ....................................................................... 12 Applications..................................................................................... 13 Basic Connections ...................................................................... 13 Transfer Function in Terms of Slope and Intercept ............... 13 Filter Capacitor ....................................................................... 14 REVISION HISTORY 4/05—Revision 0: Initial Version Input Coupling Options ........................................................ 14 Increasing the Logarithmic Slope ........................................ 15 Effect of Waveform Type on Intercept ...
Page 3
... IN = −10 dBm IN ≤ +85°C A ≤ +25° 25°C A < +85° −10 dBm IN = −40 dBm IN = −10 dBm IN ≤ 85°C A ≤ +25°C A Rev. 0| Page AD8312 Min Typ Max Unit 0.05 3.5 GHz 1.25 224 mV rms −45 0 dBm 100 kΩ 3050 || 1.4 Ω dBm − ...
Page 4
... AD8312 Parameter Conditions f = 1.9 GHz Input Impedance ±1 dB Dynamic Range T −40°C < T Maximum Input Level ±1 dB error Minimum Input Level ±1 dB error Slope Intercept Output Voltage − High Power In P Output Voltage − Low Power In P Temperature Sensitivity P 25°C ≤ T − ...
Page 5
... Conditions POWER INTERFACE VPOS (Pin 1) Supply Voltage Quiescent Current vs. Temperature −40°C ≤ Increased output is possible when using an attenuator between VOUT and VSET to raise the slope. ≤ +85°C A Rev. 0| Page AD8312 Min Typ Max Unit 2.7 3.0 5.5 V 2.8 4.2 5 ...
Page 6
... AD8312 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage VPOS VOUT, VSET Input Voltage Equivalent Power Internal Power Dissipation θ (WLCSP) JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...
Page 7
... Connection for an External Capacitor to Slow the Response of the Output. Capacitor is connected between CFLT and VOUT. 5 COMM Device Common (Ground). 6 RFIN RF Input. AD8312 VPOS RFIN 1 6 VOUT COMM 2 5 VSET CFLT 3 4 TOP VIEW (Not to Scale) Figure 2. Pin Configuration ), 2 5 Rev. 0| Page AD8312 ...
Page 8
... AD8312 TYPICAL PERFORMANCE CHARACTERISTICS 25° open; light condition = 600 LUX, 52.3 Ω termination; unless otherwise noted. Colors: +25°C = Black FLT −40°C = Blue, +85°C = Red. 1.25 +85°C +25°C –40°C 1.00 0.75 0.50 0.25 0 –60 –50 –40 –30 –20 P (dBm) IN Figure 3. VOUT and Log Conformance vs. Input Amplitude at 50 MHz; ...
Page 9
... Figure 14. Distribution of Error at −40°C, +25°C, and +85°C After Ambient Normalization vs. Input Amplitude at 2.5 GHz for 80 Devices Rev. 0| Page AD8312 +85°C +25°C –40°C –50 –40 –30 –20 – (dBm) IN +85°C +25°C – ...
Page 10
... Rev. 0| Page 500mV/VERT DIV 2V/VERT DIV 1µs/HORIZ DIV Figure 18. Power-On and Power-Off Response HP8116A 10MHz EXT REF OUTPUT TRIG PULSE GENERATOR PULSE RF OUT AD811 49.9Ω 732Ω AD8312 VPOS RFIN 1 6 52.3Ω VOUT COMM 2 5 VSET CFLT CONNECT TEKTRONIX ...
Page 11
... Rev. 0| Page AD8312 1 ±1 dB Dynamic Range (dBm) High Point Low Point σ µ µ +3.0 0.12 −48.0 +2.0 0.1 −46.0 +0.2 0.1 −49.0 +1.5 0.12 − ...
Page 12
... COMM measure of the RF input voltage with a slope and intercept controlled by the design. For a fixed termination resistance at the input of the AD8312, a given voltage corresponds to a certain power level. The external termination added before the AD8312 determines the effective power scaling. This often takes the form of a simple resistor (52.3 Ω ...
Page 13
... The logarithmic slope is defined as the change in the RSSI output voltage for change at the input. For the AD8312, the slope is nominally 20 mV/dB. Therefore change at the input results in a change at the output of approximately 200 mV. Figure 23 shows the range over which the device maintains its constant slope ...
Page 14
... RFIN (see Figure 24). This 52.3 Ω resistor (other values can also be used to select different overall input impedances) combines with the input impedance of the AD8312 (2.9 kΩ || 1.3 pF) to give a broadband input impedance of 50 Ω. While the input resistance and capacitance (R ...
Page 15
... The logarithmic slope, however, is not affected. For example, consider the case of the AD8312 being alternately fed by an unmodulated sine wave and QAM signal of the same rms power. The AD8312’s output voltage differs by the equivalent of 1 ...
Page 16
... WLCSP devices are bumped die, and exposed die can be sensitive to light condition, which can influence specified limits. Evaluation Board Figure 33 shows the schematic of the AD8312 evaluation board. The layout and silkscreen of the component and circuit sides are shown in Figure 34 to Figure 37. The board is powered by a single supply in the 2 5.5 V range. The power supply is decoupled by a single 0.1 µ ...
Page 17
... Figure 35. Layout of Component Side (WLCSP) C2 0.1µF AD8312 VPOS VPOS RFIN 1 R3 0Ω VOUT COMM 2 R6 (OPEN) R4 VSET CFLT 3 0Ω TO EDGE C3 (OPEN) Figure 33. Evaluation Board Schematic Figure 36. Silkscreen of Circuit Side (WLCSP) Figure 37. Layout of Circuit Side (WLCSP) Rev. 0| Page AD8312 R1 52.3Ω INPUT ...
Page 18
... C2 Power Supply Decoupling. The nominal supply decoupling consists of a 0.1 µF capacitor (C1). R1 Input Interface. The 52.3 Ω resistor in Position R1 combines with the AD8312’s internal input impedance to give a broadband input impedance of around 50 Ω. R2, R4 Slope Adjust. By installing resistors in R2 and R4, the nominal slope of 20 mV/dB can be changed. See the Increasing the Logarithmic Slope section for more details ...
Page 19
... Dimensions shown in millimeters Package Description 6-Ball WLCSP, 7” Pocket Tape and Reel 6-Ball WLCSP, 7” Pocket Tape and Reel Evaluation Board Rev. 0| Page 0.50 3 0.50 BSC BOTTOM VIEW (BUMP SIDE UP) Package Branding Outline Information CB-6 Q00 CB-6 Q00 AD8312 Ordering Quantity 3000 250 ...
Page 20
... AD8312 NOTES ©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05260–0–4/05(0) Rev. 0| Page ...