PIC16F1526-I/PT Microchip Technology, PIC16F1526-I/PT Datasheet - Page 110

MCU 14KB FLASH 768B RAM 64-TQFP

PIC16F1526-I/PT

Manufacturer Part Number
PIC16F1526-I/PT
Description
MCU 14KB FLASH 768B RAM 64-TQFP
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC16F1526-I/PT

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
768 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
9
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1526-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F1526-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16(L)F1526/27
EXAMPLE 11-3:
DS41458A-page 110
; This write routine assumes the following:
; 1. 64 bytes of data are loaded, starting at the address in DATA_ADDR
; 2. Each word of data to be written is made up of two adjacent bytes in DATA_ADDR,
; stored in little endian format
; 3. A valid starting address (the least significant bits = 00000) is loaded in ADDRH:ADDRL
; 4. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
;
LOOP
START_WRITE
BCF
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
BSF
BSF
MOVIW
MOVWF
MOVIW
MOVWF
MOVF
XORLW
ANDLW
BTFSC
GOTO
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
INCF
GOTO
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BCF
BSF
WRITING TO FLASH PROGRAM MEMORY
INTCON,GIE
PMADRH
ADDRH,W
PMADRH
ADDRL,W
PMADRL
LOW DATA_ADDR
FSR0L
HIGH DATA_ADDR ; Load initial data address
FSR0H
PMCON1,CFGS
PMCON1,WREN
PMCON1,LWLO
FSR0++
PMDATL
FSR0++
PMDATH
PMADRL,W
0x1F
0x1F
STATUS,Z
START_WRITE
55h
PMCON2
0AAh
PMCON2
PMCON1,WR
PMADRL,F
LOOP
PMCON1,LWLO
55h
PMCON2
0AAh
PMCON2
PMCON1,WR
PMCON1,WREN
INTCON,GIE
; Disable ints so required sequences will execute properly
; Bank 3
; Load initial address
;
;
;
; Load initial data address
;
;
; Not configuration space
; Enable writes
; Only Load Write Latches
; Load first data byte into lower
;
; Load second data byte into upper
;
; Check if lower bits of address are '00000'
; Check if we're on the last of 32 addresses
;
; Exit if last of 32 words,
;
; Start of required write sequence:
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; NOP instructions are forced as processor
; loads program memory write latches
;
; Still loading latches Increment address
; Write next latches
; No more loading latches - Actually start Flash program
; memory write
; Start of required write sequence:
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; NOP instructions are forced as processor writes
; all the program memory write latches simultaneously
; to program memory.
; After NOPs, the processor
; stalls until the self-write process in complete
; after write processor continues with 3rd instruction
; Disable writes
; Enable interrupts
Preliminary
 2011 Microchip Technology Inc.

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