SI5365-C-GQR Silicon Laboratories Inc, SI5365-C-GQR Datasheet - Page 17

• Manufacturer Part Number: SI5365-C-GQR
• Description: IC CLOCK MULTIPLIER PROG 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5365-C-GQR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin #
34
35
37
39
40
44
45
50
56
58
59
Pin Name
FOS_CTL
DBL2_BY
CKIN2+
CKIN3+
CKIN1+
CKIN2–
CKIN3–
CKIN1–
DBL5
C1A
C2A
I/O Signal Level
O
O
I
I
I
I
I
I
LVCMOS
LVCMOS
Table 6. Si5365 Pin Descriptions (Continued)
3-Level
3-Level
3-Level
MULTI
MULTI
MULTI
Clock Input 2.
Differential input clock. This input can also be driven with a single-
ended signal.
CKOUT2 Disable/PLL Bypass Mode Control.
Controls enable of CKOUT2 divider/output buffer path and PLL bypass
mode.
L = CKOUT2 Enabled.
M = CKOUT2 Disabled.
H = BYPASS Mode with CKOUT2 enabled. Bypass is not available with
CMOS outputs.
This pin has a weak pullup and weak pulldown and defaults to M.
Some designs may require an external resistor voltage divider when
driven by an active device that will tri-state.
Clock Input 3.
Differential clock input. This input can also be driven with a single-
ended signal.
Clock Input 1.
Differential clock input. This input can also be driven with a single-
ended signal.
CKOUT5 Disable.
This pin performs the following functions:
L = Normal operation. Output path is active and signal format is deter-
mined by SFOUT inputs.
M = CMOS signal format. Overrides SFOUT signal format to allow
CKOUT5 to operate in CMOS format while the clock outputs operate in
a differential output format.
H = Powerdown. Entire CKOUT5 divider and output buffer path is pow-
ered down. CKOUT5 output will be in tristate mode during powerdown.
This pin has a weak pullup and weak pulldown and defaults to M.
Some designs may require an external resistor voltage divider when
driven by an active device that will tri-state.
Frequency Offset Control.
This pin enables or disables use of the CKIN2 FOS reference as an
input to the clock selection state machine.
L = FOS Disabled.
M = Stratum 3/3E FOS Threshold.
H = SONET Minimum Clock FOS Threshold.
This pin has both weak pullups and weak pulldowns and defaults to M.
Some designs may require an external resistor voltage divider when
driven by an active device that will tri-state.
CKIN1 Active Clock Indicator.
This pin serves as the CKIN1 active clock indicator.
0 = CKIN1 is not the active input clock.
1 = CKIN1 is currently the active input clock to the PLL.
CKIN2 Active Clock Indicator.
This pin serves as the CKIN2 active clock indicator.
0 = CKIN2 is not the active input clock.
1 = CKIN2 is currently the active input clock to the PLL.
Rev. 0.5
Description
Si5365
17