SI5365-C-GQ Silicon Laboratories Inc, SI5365-C-GQ Datasheet - Page 3

• Manufacturer Part Number: SI5365-C-GQ
• Description: IC CLOCK MULTIPLIER PROG 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5365-C-GQ

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. Performance Specifications (Continued)
(V
Table 2. Absolute Maximum Ratings
PLL Performance
Jitter Generation
Jitter Transfer
Phase Noise
Subharmonic Noise
Spurious Noise
Package
Thermal Resistance
Junction to Ambient
Notes:
DC Supply Voltage
LVCMOS Input Voltage
Operating Junction Temperature
Storage Temperature Range
ESD HBM Tolerance (100 pF, 1.5 kΩ); All pins except
CKIN+/CKIN–
ESD MM Tolerance; All pins except CKIN+/CKIN–
ESD HBM Tolerance (100 pF, 1.5 kΩ); CKIN+/CKIN–
ESD MM Tolerance; CKIN+/CKIN–
Latch-Up Tolerance
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
DD
1. For a more comprehensive listing of device specifications, please consult the Silicon Laboratories Any-Rate Precision
2. This is the amount of leakage that the 3 level input can tolerate from an external driver. See the Family Reference
= 1.8 ±5% or 2.5 V ±10%, T
Clock Family Reference Manual. This document can be downloaded from
Documentation)
Manual. In most designs, an external resistor voltage divider is recommended.
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.
Parameter
.
Parameter
Symbol
SP
SP
CKO
A
J
= –40 to 85 ºC)
J
θ
GEN
SUBH
SPUR
PK
JA
PN
(n > 1, n x F3 < 100 MHz)
f
Phase Noise @ 100 kHz
f
IN
IN
LVPECL output format
Max spur @ n x F3
= f
Preliminary Rev. 0.4
= f
50 kHz–80 MHz
12 kHz–20 MHz
Test Condition
100 kHz offset
OUT
100 Hz offset
10 kHz offset
OUT
1 MHz offset
1 kHz offset
Still Air
Offset
= 622.08 MHz,
= 622.08 MHz
Symbol
T
V
T
V
STG
JCT
DIG
DD
www.silabs.com/timing
–0.3 to (V
Min
—
—
—
—
—
—
—
—
—
—
—
–0.5 to 2.75
–55 to 150
–55 to 150
Value
JESD78 Compliant
200
700
150
2
DD
0.05
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Typ
0.6
0.6
40
+ 0.3)
(click on
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Si5365
0.1
—
Unit
kV
ºC
ºC
V
V
V
V
V
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps rms
ps rms
ºC/W
Unit
dBc
dBc
dB
3