NB6L11SMNG ON Semiconductor, NB6L11SMNG Datasheet - Page 2

• Manufacturer Part Number: NB6L11SMNG
• Description: IC BUFFER/XLATOR DIFF 1:2 16-QFN
• Manufacturer: ON Semiconductor
• Series: AnyLevel™r
• Type: Fanout Buffer (Distribution), Translatorr

Specifications of NB6L11SMNG

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVCMOS, LVDS, LVPECL, LVTTL
• Output: LVDS
• Frequency - Max: 2GHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TFQFN Exposed Pad
• Frequency-max: 2GHz
• Number Of Outputs: 4
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: -40C to 85C
• Propagation Delay Time: 0.45ns
• Operating Supply Voltage (min): 2.375V
• Mounting: Surface Mount
• Pin Count: 16
• Operating Supply Voltage (typ): 2.5V
• Package Type: QFN EP
• Input Frequency: >2000MHz
• Operating Temperature Classification: Industrial
• Max Input Freq: >2000 MHz
• Propagation Delay (max): 0.45 ns @ 2.375V to 2.625V
• Supply Voltage (max): 2.625 V
• Supply Voltage (min): 2.375 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NB6L11SMNG; NB6L11SMNGOS

1. In the differential configuration when the input termination pins(VTD0/VTD0, VTD1/ VTD1) are connected to a common termination voltage
Table 1. PIN DESCRIPTION
or left open, and if no signal is applied on D0/D0, D1/D1 input, then the device will be susceptible to self−oscillation.
Pin
EP
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Name
V
V
V
V
V
V
V
V
V
NC
Q0
Q0
Q1
Q1
D
D
CC
CC
CC
CC
CC
EE
EE
TD
TD
LVPECL, CML, LVDS,
LVPECL, CML, LVDS,
LVCMOS, LVTTL
LVCMOS, LVTTL
LVDS Output
LVDS Output
LVDS Output
LVDS Output
Figure 3. NB6L11S Pinout, 16−pin QFN
I/O
−
−
−
−
−
−
−
Q0
Q0
Q1
Q1
1
2
3
4
V
V
16
5
CC
CC
http://onsemi.com
Non−inverted D output. Typically loaded with 100 W receiver termination
resistor across differential pair.
Inverted D output. Typically loaded with 100 W receiver termination resistor
across differential pair.
Non−inverted D output. Typically loaded with 100 W receiver termination
resistor across differential pair.
Inverted D output. Typically loaded with 100 W receiver termination resistor
across differential pair.
Positive Supply Voltage.
No Connect.
Negative Supply Voltage.
Negative Supply Voltage.
Internal 50 W termination pin for D.
Inverted Differential Clock/Data Input (Note 1).
Non−inverted Differential Clock/Data Input (Note 1).
Internal 50 W termination pin for D.
Positive Supply Voltage.
Positive Supply Voltage.
Positive Supply Voltage.
Positive Supply Voltage.
Exposed pad. The exposed pad (EP) on the package bottom must be
attached to a heat−sinking conduit. The exposed pad may only be
electrically connected to V
V
15
NB6L11S
NC
CC
6
2
V
V
14
7
CC
EE
V
13
V
8
CC
EE
12
10
11
9
(Top View)
EE
V
D
D
V
TD
TD
Exposed Pad (EP)
.
Description