NB4L339MNR4G ON Semiconductor, NB4L339MNR4G Datasheet
NB4L339MNR4G
Specifications of NB4L339MNR4G
NB4L339MNR4GOSTR
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NB4L339MNR4G Summary of contents
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NB4L339 2 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider / Fan−Out Buffer Multi−Level Inputs w/ Internal Termination Description The NB4L339 is a multi−function Clock generator featuring a 2:1 Clock multiplexer front end ...
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DIVSEL CLKSEL CLKA 50−W VTA 50−W CLKA EXAMPLE: fin = 622.08 MHz CLKB 50−W VTB 50−W CLKB EN MR Table 1. Input Select Function Table CLKSEL* CLK Input Selected 0 CLKA 1 CLKB Table 3. Clock Enable/Disable Function Table CLK ...
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Table 4. Pin Description Pin Name I − CLKA LVPECL, CML, LVDS Input 3 VTA − 4 CLKA LVPECL, CML, LVDS Input 5 CLKB LVPECL, CML, LVDS Input 6 VTB − 7 CLKB LVPECL, ...
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Table 5. ATTRIBUTES Input Default State Resistors ESD Protection Moisture Sensitivity (Note 2) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 2. For additional information, see Application Note AND8003/D. Table 6. MAXIMUM RATINGS Symbol Parameter ...
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Table 7. DC CHARACTERISTICS, CLOCK Inputs, LVPECL Outputs V = 2.375 −40°C to +85°C (Note Symbol Characteristic I Power Supply Current (Inputs and Outputs Open) EE ...
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Table 8. AC CHARACTERISTICS V Symbol Characteristic fin Maximum Input CLOCK Frequency max V Output Voltage Amplitude (@ V OUTPP (See Figure Propagation Delay to CLKx/CLKx to Qx/Qx PLH t Output Differential ÷ 1 PHL trr Reset ...
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Figure 4. NB4L339 vs. Agilent 8665A 622.08 MHz at 3.3 V, Room Ambient 800 700 600 500 400 300 200 100 0 0 0.1 Figure 5. Output Voltage Amplitude (V Application Information The NB4L339 is a high−speed, Clock multiplexer, divider ...
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MR CLK Q (÷1) Q (÷2) Q (÷4) Q (÷8) CLK MR Q (÷n) NOTE: On the rising edge of MR, Q goes HIGH after the first rising edge of CLK, following a high−to−low clock transition. CLK Q (÷n) EN ...
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CLKn 50 W VTn 50 W CLKn Figure 9. Input Structure IHmax V thmax V ILmax Vth CLK IHmin V thmin V ILmin V EE Figure 11. V Diagram th ...
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CLKx − 2 LVPECL Driver CLKx GND Figure 16. LVPECL Interface V CC CLKx CML V = ...
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... Figure 21. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices) ORDERING INFORMATION Device NB4L339MNG NB4L339MNR2G *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/ ...
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... X 0.28 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...