SI4126-F-GM Silicon Laboratories Inc, SI4126-F-GM Datasheet

IC WLAN SYNTH (RF2/IF) 28MLP

SI4126-F-GM

Manufacturer Part Number
SI4126-F-GM
Description
IC WLAN SYNTH (RF2/IF) 28MLP
Manufacturer
Silicon Laboratories Inc
Type
Frequency Synthesizerr
Datasheet

Specifications of SI4126-F-GM

Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
2.3GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
2.3GHz
Operating Frequency
900 MHz
Supply Current
25.7 mA
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Power Gain Typ
3.5 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1289-5
I S M R F S
F
Features
Applications
Description
The Si4136 is a monolithic integrated circuit that performs both IF and RF
synthesis for wireless communications applications. The Si4136 includes
three VCOs, loop filters, reference and VCO dividers, and phase detectors.
Divider and powerdown settings are programmable through a three-wire
serial interface.
Functional Block Diagram
Rev. 1.41 1/10
AUXOUT
O R
SDATA
PWDN



Integrated VCOs, loop filters,
varactors, and resonators
SCLK
Dual-band RF synthesizers
IF synthesizer
ISM and MMDS band
communications
Wireless LAN and WAN
SEN
XIN
RF1: 2300 MHz to 2500 MHz
RF2: 2025 MHz to 2300 MHz
62.5 MHz to 1000 MHz
W
Reference
Interface
Amplifier
Register
Control
Power
Down
Serial
22-bit
Data
Test
Mux
I R E LE S S
Y N T H E S I ZE R
÷1/÷2
R
R
R
RF1
RF2
IF
C
O M M U N I C A T I O N S
Phase
Detect
Phase
Detect
Phase
Detect
Copyright © 2010 by Silicon Laboratories

Minimal external components
required
Low phase noise
5 µA standby current
25.7 mA typical supply current
2.7 V to 3.6 V operation
Packages: 24-pin TSSOP,
28-lead QFN
Dual-band communications
N
N
W
Lead-free/RoHS-compliant options
N
available
RF1
RF2
IF
I T H
RF1
RF2
IF
2
2
I
N T E G R A T E D
IFDIV
RFOUT
IFOUT
IFLA
IFLB
S i 4 1 3 6 / S i 4 1 2 6
V C O
Patents pending
SDATA
RFOUT
VDDR
GND
GND
GND
GND
GND
SCLK
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
Ordering Information:
1
2
3
4
5
6
7
S
Si4136-BM/GM
28 27 26 25 24 23 22
1
2
3
4
5
6
7
8
9
10
11
12
Pin Assignments
8
Si4136-BT/GT
See page 29.
9
10 11 12 13 14
GND
Si4136/Si4126
24
23
22
21
20
19
18
17
16
15
14
13
21
20
19
18
17
16
15
SEN
VDDI
IFOUT
GND
IFLB
IFLA
GND
VDDD
GND
XIN
PWDN
AUXOUT
GND
IFLB
IFLA
GND
VDDD
GND
XIN

Related parts for SI4126-F-GM

SI4126-F-GM Summary of contents

Page 1

... IFLB IFLA GND 7 18 GND GND VDDD 9 16 GND GND 10 15 GND XIN 11 14 PWDN RFOUT 12 13 VDDR AUXOUT Si4136-BM/ GND GND 2 20 GND IFLB IFLA GND 4 18 GND GND VDDD 6 16 GND GND 7 15 GND XIN Patents pending Si4136/Si4126 ...

Page 2

... Si4136/Si4126 2 Rev. 1.41 ...

Page 3

... Reference Frequency Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.8. Powerdown Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.9. Auxiliary Output (AUXOUT Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 4. Pin Descriptions: Si4136-BT/ Pin Descriptions: Si4136-BM/ Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7. Si4136 Derivative Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 8. Package Outline: Si4136-BT/ Package Outline: Si4136-BM/ Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Si4136/Si4126 Rev. 1.41 Page 3 ...

Page 4

... Si4136/Si4126 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Temperature Supply Voltage Supply Voltages Difference Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25°C unless otherwise stated. ...

Page 5

... For signals SCLK, SDATA, SEN, and PWDN. 3. For signal AUXOUT. Symbol Test Condition RF1 and IF operating PWDN = –500 µ 500 µ Rev. 1.41 Si4136/Si4126 Min Typ Max Unit — 25 — 15 — — — 1 — µA 0.7 V — — — — 0 –10 — 10 µA –10 — ...

Page 6

... Si4136/Si4126 Table 4. Serial Interface Timing (V = 2 – ° Parameter SCLK Cycle Time SCLK Rise Time SCLK Fall Time SCLK High Time SCLK Low Time 2 SDATA Setup Time to SCLK 2 SDATA Hold Time from SCLK 2 SEN to SCLKDelay Time 2 SCLK ...

Page 7

... Figure 2. Serial Interface Timing Diagram First bit clocked data field Figure 3. Serial Word Format Rev. 1.41 Si4136/Si4126 A A Last bit clocked address field 7 ...

Page 8

... Si4136/Si4126 Table 5. RF and IF Synthesizer Characteristics 2 3 – ° Parameter XIN Input Frequency XIN Input Frequency Reference Amplifier Sensitivity Phase Detector Update Frequency 2 RF1 VCO Tuning Range 2 RF2 VCO Tuning Range IF VCO Center Frequency Range IFOUT Tuning Range from f CEN IFOUT VCO Tuning Range from f ...

Page 9

... Figures 4, 5 pup f > 500 kHz  Figures 4, 5 pup  500 kHz f  Figures 4, 5 pdn Rev. 1.41 Si4136/Si4126 Min Typ Max Unit — –28 –20 dBc — –23 –20 dBc — –26 –20 dBc –7 –3.5 – ...

Page 10

... Si4136/Si4126 RF synthesizers settled to within 0.1 ppm frequency error. t pup PWDN SEN PDIB = 1 PDIB = 0 SDATA PDRB = 1 PDRB = 0 Figure 4. Software Power Management Timing Diagram 10 t pdn PWDN PWDN Figure 5. Hardware Power Management Timing Diagram Rev. 1.41 RF synthesizers settled to within 0.1 ppm frequency error. ...

Page 11

... Figure 6. Typical Transient Response RF1 at 2.4 GHz with 1 MHz Phase Detector Update Frequency Rev. 1.41 Si4136/Si4126 11 ...

Page 12

... Si4136/Si4126 -60 -70 -80 -90 -100 -110 -120 -130 -140 1.E+02 1.E+03 Figure 7. Typical RF1 Phase Noise at 2.4 GHz with 1 MHz Phase Detector Update Frequency Figure 8. Typical RF1 Spurious Response at 2.4 GHz with 1 MHz Phase Detector Update Frequency 12 1.E+04 1.E+05 Offset Frequency (Hz) Typical RF1 Phase Noise at 2 ...

Page 13

... Figure 9. Typical RF2 Phase Noise at 2.1 GHz with 1 MHz Phase Detector Update Frequency Figure 10. Typical RF2 Spurious Response at 2.1 GHz with 1 MHz Phase Detector Update Frequency 1.E+04 1.E+05 Offset Frequency (Hz) Typical RF2 Phase Noise at 2.1 GHz Rev. 1.41 Si4136/Si4126 1.E+06 13 ...

Page 14

... Si4136/Si4126 -60 -70 -80 -90 -100 -110 -120 -130 -140 1.E+02 Figure 11. Typical IF Phase Noise at 800 MHz with 1 MHz Phase Detector Update Frequency Figure 12. IF Spurious Response at 800 MHz with 1 MHz Phase Detector Update Frequency 14 1.E+03 1.E+04 Offset Frequency (Hz) Typical IF Phase Noise at 800 MHz Rev ...

Page 15

... GND GND 9 GND 10 GND 560 pF 11 RFOUT RFOUT 0.022  VDDR *Add 30  series resistor if using IF output divide values and f Figure 13. Typical Application Circuit: Si4136-BT/GT Si4136/Si4126 V DD Si4136 30  24 SEN 0.022 F 23 VDDI 22 IFOUT 21 GND 20 IFLB 19 IFLA 18 GND 0.022 F ...

Page 16

... Si4136/Si4126 2. Functional Description The Si4136 is a monolithic integrated circuit that performs IF and dual-band RF synthesis for many wireless communications applications. This integrated circuit (IC), along with a minimum number of external components, is all that is necessary to implement the frequency synthesis function in applications like W-LAN using the IEEE 802.11 standard. ...

Page 17

... Therefore, if LDETB goes high both the IF and RF PLLs should promptly be re-tuned by initiating the self-tuning algorithm. 2.4. Output Frequencies The IF and RF output frequencies are set by programming the R- and N-Divider registers. Each PLL has its own R and N registers so that each can be Rev. 1.41 Si4136/Si4126 is limited. For external 17 ...

Page 18

... Si4136/Si4126 programmed independently. Programming either the R- or N-Divider register for RF1 or RF2 automatically selects the associated output. When XINDIV2 = 0, the reference frequency on the XIN pin is divided by R and this signal is the input to the PLL’s phase detector. The other input to the phase detector is the PLL’ ...

Page 19

... The LDETB signal can be selected by setting the AUXSEL bits to 011. This signal can be used to indicate that the PLL is about to lose lock due to excessive ambient temperature drift and should be re- tuned. Rev. 1.41 Si4136/Si4126 LPWR=1 400 600 800 1000 1200 Load Resistance () ...

Page 20

... Si4136/Si4126 PWDN Pin AUTOPDB PWDN = 0 PWDN = 1 Note don’t care. 20 Table 10. Powerdown Configuration PDIB PDRB IF Circuitry Rev. 1.41 RF Circuitry OFF OFF OFF OFF OFF ON ON OFF ...

Page 21

... Note: Registers 9–15 are reserved. Writes to these registers may result in unpredictable behavior. Table 11. Register Summary Bit Bit Bit Bit Bit Bit Bit Bit AUXSEL IFDIV RF1 N RF2 Rev. 1.41 Si4136/Si4126 Bit Bit Bit Bit Bit Bit XIN LPWR 0 AUTO 0 0 PDB DIV2 PDIB IF R RF1 R RF2 R IF Bit 0 0 PDRB 21 ...

Page 22

... Si4136/Si4126 Register 0. Main Configuration Address Field = A[3:0] = 0000 Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name AUXSEL Bit Name 17:14 Reserved 13:12 AUXSEL 11:10 IFDIV 9:7 Reserved 6 XINDIV2 5 LPWR 4 Reserved 3 AUTOPDB 2:0 Reserved IFDIV XIN DIV2 Function Program to zero. ...

Page 23

... IF Phase Detector Gain Constant. N Value K PI <2048 = 00 2048–4095 = 01 4096–8191 = 10 >8191 = 11 RF2 Phase Detector Gain Constant. N Value K P2 <2048 = 00 2048–4095 = 01 4096–8191 = 10 >8191 = 11 RF1 Phase Detector Gain Constant. N Value K P1 <4096 = 00 4096–8191 = 01 8192–16383 = 10 >16383 = 11 Rev. 1.41 Si4136/Si4126 ...

Page 24

... Si4136/Si4126 Register 2. Powerdown Address Field (A[3:0]) = 0010 Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name Bit Name 17:2 Reserved 1 PDIB 0 PDRB Register 3. RF1 N Divider Address Field (A[3:0]) = 0011 Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit ...

Page 25

... R R Divider for RF2 Synthesizer. RF2 R RF2 Function Program to zero. N Divider for IF Synthesizer.  56 Function can be any value from 7 to 8189 8189 8189 8189 Function can be any value from 7 to 8189 8189 8189 8189 if K Rev. 1.41 Si4136/Si4126 RF1 = RF2 = 00 P2 ...

Page 26

... Si4136/Si4126 Register Divider Address Field (A[3:0]) = 1000 Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:13 Reserved Program to zero. 12 Divider for IF Synthesizer Function can be any value from 7 to 8189 8189 8189 8189 if K Rev. 1. ...

Page 27

... Supply voltage for IF analog circuitry 24 SEN Enable serial port input 1 24 SCLK SEN 2 23 VDDI SDATA 3 22 GND IFOUT 4 21 GND GND 5 20 IFLB GND IFLA 7 18 GND GND VDDD 9 16 GND GND 10 15 GND XIN 11 14 PWDN RFOUT 12 13 AUXOUT VDDR Rev. 1.41 Si4136/Si4126 27 ...

Page 28

... Si4136/Si4126 5. Pin Descriptions: Si4136-BM/GM Pin Number(s) Name 7–9, 14, GND 16, 18, 21, 22 RFOUT 11 VDDR 12 AUXOUT 13 PWDN 15 XIN 17 VDDD 19, 20 IFLA, IFLB 23 IFOUT 24 VDDI 25 SEN 26 SCLK 27 SDATA GND GND 2 20 GND IFLB IFLA GND 4 18 GND GND VDDD 6 16 GND GND 7 15 GND ...

Page 29

... GHz/2.3 GHz/IF OUT Si4136-F-GM 2.5 GHz/2.3 GHz/IF OUT/Lead Free Si4126-F-BM Si4126-F-GM 2.3 GHz/IF OUT/Lead Free 7. Si4136 Derivative Devices The Si4136 performs both IF and dual-band RF frequency synthesis. The Si4126 is a derivative of this device. The Si4126 features two synthesizers, RF2 and IF; it does not include RF1. The pinouts for the Si4126 and the Si4136 are the same ...

Page 30

... Si4136/Si4126 8. Package Outline: Si4136-BT/GT Figure 18 illustrates the package details for the Si4136-BT/GT. Table 12 lists the values for the dimensions shown in the illustration. E/2 ddd aaa C Seating Plane C Figure 18. 24-Pin Thin Shrink Small Outline Package (TSSOP) Table 12. Package Diagram Dimensions Symbol 30 E1 ...

Page 31

... Seating C Plane SIDE VIEW Table 13. Package Dimensions Controlling Dimension: mm Symbol Millimeters Min Nom Max A — 0.85 0.90 A1 0.00 0.01 0.05 b 0.18 0.23 0. 5.00 BSC D2, E2 2.55 2.70 2. 0.50 BSC L 0.50 0.60 0.75  12° Rev. 1.41 Si4136/Si4126 b 0. Pin 0. BOTTOM VIEW 31 ...

Page 32

... Si4136/Si4126 OCUMENT HANGE IST Revision 1.3 to Revision 1.4  Si4136-BT change to Si4136-BT/GT  Si4136-BM change to Si4136-BM/GM Revision 1.4 to Revision 1.41  Updated contact information. 32 Rev. 1.41 ...

Page 33

... N : OTES Si4136/Si4126 Rev. 1.41 33 ...

Page 34

... Si4136/Si4126 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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