AD9516-3BCPZ Analog Devices Inc, AD9516-3BCPZ Datasheet - Page 2

IC CLOCK PLL/VCO 2GHZ 64LFCSP

AD9516-3BCPZ

Manufacturer Part Number
AD9516-3BCPZ
Description
IC CLOCK PLL/VCO 2GHZ 64LFCSP
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of AD9516-3BCPZ

Pll
Yes
Input
Clock
Output
CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:14
Differential - Input:output
Yes/Yes
Frequency - Max
2.25GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.25GHz
Clock Ic Type
Clock Generator
Ic Interface Type
Serial
Frequency
2GHz
No. Of Outputs
10
No. Of Multipliers / Dividers
8
Supply Voltage Range
3.135V To 3.465V
Digital Ic Case Style
LFCSP
Function
Clock Generator
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
LFCSP EP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9516-3/PCBZ - BOARD EVAL FOR AD9516-3 2.0GHZ
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9516-3BCPZ
Manufacturer:
AD
Quantity:
148
Part Number:
AD9516-3BCPZ
Manufacturer:
ADI
Quantity:
648
Part Number:
AD9516-3BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9516-3
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Timing Diagrams............................................................................ 15
Absolute Maximum Ratings.......................................................... 16
Power Supply Requirements ....................................................... 4
PLL Characteristics ...................................................................... 4
Clock Inputs .................................................................................. 6
Clock Outputs ............................................................................... 6
Timing Characteristics ................................................................ 7
Clock Output Additive Phase Noise (Distribution Only;
VCO Divider Not Used) .............................................................. 8
Clock Output Absolute Phase Noise (Internal VCO Used).... 9
Clock Output Absolute Time Jitter (Clock Generation
Using Internal VCO) .................................................................. 10
Clock Output Absolute Time Jitter (Clock Cleanup
Using Internal VCO) .................................................................. 10
Clock Output Absolute Time Jitter (Clock Generation
Using External VCXO) .............................................................. 10
Clock Output Additive Time Jitter (VCO Divider
Clock Output Additive Time Jitter (VCO Divider Used) ..... 11
Delay Block Additive Time Jitter.............................................. 12
Serial Control Port ..................................................................... 12
PD , RESET , and SYNC Pins ..................................................... 13
LD, STATUS, and REFMON Pins............................................ 13
Power Dissipation....................................................................... 14
Not Used) .................................................................................... 11
Rev. A | Page 2 of 80
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Pin Configuration and Function Descriptions........................... 17
Typical Performance Characteristics ........................................... 19
Terminology .................................................................................... 25
Detailed Block Diagram ................................................................ 26
Theory of Operation ...................................................................... 27
Serial Control Port ......................................................................... 50
Thermal Performance.................................................................... 54
Register Map Overview ................................................................. 55
Register Map Descriptions ............................................................ 59
Applications Information .............................................................. 77
Outline Dimensions ....................................................................... 80
Thermal Resistance .................................................................... 16
ESD Caution................................................................................ 16
Operational Configurations...................................................... 27
Digital Lock Detect (DLD) ....................................................... 36
Clock Distribution ..................................................................... 40
Reset Modes ................................................................................ 48
Power-Down Modes .................................................................. 49
Serial Control Port Pin Descriptions....................................... 50
General Operation of Serial Control Port............................... 50
The Instruction Word (16 Bits) ................................................ 51
MSB/LSB First Transfers ........................................................... 51
Frequency Planning Using the AD9516.................................. 77
Using the AD9516 Outputs for ADC Clock Applications.... 77
LVPECL Clock Distribution ..................................................... 78
LVDS Clock Distribution .......................................................... 78
CMOS Clock Distribution ........................................................ 79
Ordering Guide .......................................................................... 80
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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