ICS181M-02LF IDT, Integrated Device Technology Inc, ICS181M-02LF Datasheet - Page 3

• Manufacturer Part Number: ICS181M-02LF
• Description: IC CLOCK GEN LOW EMI 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Spread Spectrum Clock Generatorr

Specifications of ICS181M-02LF

• Pll: Yes
• Input: Clock, Crystal
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:1
• Differential - Input:output: No/No
• Frequency - Max: 48MHz
• Divider/multiplier: No/No
• Voltage - Supply: 3.135 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 28MHz
• Number Of Elements: 1
• Supply Current: 50mA
• Pll Input Freq (min): 28MHz
• Pll Input Freq (max): 48MHz
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOIC N
• Output Frequency Range: 28 to 48MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 181M-02LF; 800-1009; 800-1009-5; 800-1009

IDT™ / ICS™ LOW EMI CLOCK GENERATOR
ICS181-02
LOW EMI CLOCK GENERATOR
External Components
The ICS181-02 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 6 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50 trace (a commonly used trace
impedance) place a 33 resistor in series with the clock
line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20 .
value of these capacitors is given by the following
equation:
Absolute Maximum Ratings
Recommended Operation Conditions
Stresses above the ratings listed below can cause permanent damage to the ICS181-02. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Item
3
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the VDD
pin as possible. No vias should be used between the
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via.
2) To minimize EMI, the 33 series termination resistor
(if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed away
from the ICS181-02. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
+3.135
Min.
0
7 V
-0.5 V to VDD+0.5 V
0 to +70 C
-65 to +150 C
125 C
260 C
Typ.
Rating
Max.
+5.5
ICS181-02
+70
Units
REV C 051310
V
C
SSCG