SI5356A-A-GM Silicon Laboratories Inc, SI5356A-A-GM Datasheet

IC CLK GENERATOR 200MHZ 24-QFN

SI5356A-A-GM

Manufacturer Part Number
SI5356A-A-GM
Description
IC CLK GENERATOR 200MHZ 24-QFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI5356A-A-GM

Package / Case
24-QFN
Pll
Yes
Input
CMOS, Crystal
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
2:8
Differential - Input:output
No/No
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
1.71 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
*
Max Input Freq
200 MHz
Supply Voltage (max)
3.3 V
Supply Voltage (min)
1.8 V
Max Output Freq
200 MHz
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1750 - EVALUATION BOARD FOR SI5356
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1749-5
I
Q
Features
Applications
Description
The Si5356 is a highly flexible, I
synthesizing four completely non-integer related frequencies up to 200 MHz. The
device has four banks of outputs with each bank supporting two CMOS outputs at
the same frequency. Using Silicon Laboratories' patented MultiSynth fractional
divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis
error regardless of configuration, enabling the replacement of multiple clock ICs
and crystal oscillators with a single device. Each output bank is independently
configurable to support 1.8, 2.5, or 3.3 V. The device is programmable via an I
SMBus-compatible serial interface and supports operation from a 1.8, 2.5, or
3.3 V core supply.
Functional Block Diagram
Preliminary Rev. 0.3 2/11
2
Generates any frequency from 1 to
200 MHz on each of the 4 output banks
Programmable frequency configuration
Guaranteed 0 ppm frequency synthesis
error for any combination of frequencies
25 or 27 MHz xtal or 5–200 MHz input clk
Eight CMOS clock outputs
Easy to use programming software
Configurable “triple A” spread spectrum:
any clock, any frequency, and with any
spread amount
Programmable output phase adjustment
with <20 ps error
Interrupt pin indicates LOS or LOL
Printers
Audio/video
DSLAM
C P
UAD
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
ROGRAMMABLE
F
R E Q U E N C Y
2
C programmable clock generator capable of
Copyright © 2011 by Silicon Laboratories
8-O
Storage area networks
Switches/routers
Servers
, A
OEB pin disables all outputs or per
bank OEB control via I
Low jitter: 50 ps pk-pk (typ), 100 ps
pk-pk period jitter (max)
Excellent PSRR performance
eliminates need for external power
supply filtering
Low power: 45 mA
Core VDD: 1.8, 2.5, or 3.3 V
Separate VDDO for each bank of
outputs: 1.8, 2.5, or 3.3 V
Small size: 4x4 mm 24-QFN
Industrial temperature range:
–40 to +85 °C
UTPUT
NY
- F
R E Q U E N C Y
C
LOCK
2
C
2
C/
G
CLKIN
SSC_DIS
I2C_LSB
E NE RAT OR
1 – 2 0 0 M H
CLKIN
XA
XB
P1
P4
P5
OEB
XA
XB
1
2
3
4
5
6
Ordering Information:
1
2
3
4
5
6
7
24
Pin Assignments
7
24
See page 24.
23
8
8
23
Top View
Si5356
Top View
9
22
GND
9
22
GND
GND
GND
10
21
10
21
11
20
11
20
Z
12
19
12
19
,
18
17
16
15
14
13
18
17
16
15
14
13
CLK2
CLK3
VDDOC
CLK4
CLK5
VDDOB
Si5356
CLK2
CLK3
VDDOC
CLK4
CLK5
VDDOB

Related parts for SI5356A-A-GM

SI5356A-A-GM Summary of contents

Page 1

ROGRAMMABLE Q F UAD Features Generates any frequency from 1 to  200 MHz on each of the 4 output banks Programmable frequency configuration  Guaranteed 0 ppm ...

Page 2

Si5356 2 Preliminary Rev. 0.3 ...

Page 3

T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

Si5356 1. Electrical Specifications Table 1. Recommended Operating Conditions (V = 1.8 V –5% to +10%, 2.5 or 3.3 V ±10 Parameter Ambient Temperature Core Supply Voltage Output Buffer Supply Voltage Note: All minimum and maximum specifications are ...

Page 5

Table 3. DC Characteristics (V = 1.8 V –5% to +10%, 2.5 or 3.3 V ±10 Parameter Symbol Current Consumption High Level Input Voltage Low Level Input Voltage Clock Output High Level Output Voltage Clock Output Low Level ...

Page 6

Si5356 Table 4. AC Characteristics (V = 1.8 V –5% to +10%, 2.5 or 3.3 V ±10 Parameter Input Clock Clock Input Frequency Clock Input Rise/Fall Time Clock Input Duty Cycle Clock Input Capacitance Output Clocks Clock Output ...

Page 7

Table 5. Crystal Specifications Parameter Symbol Crystal Frequency Load Capacitance (on-chip differential) Crystal Output Capacitance Equivalent Series Resistance Max Drive Level Table 6. Thermal Characteristics Parameter Symbol  Thermal Resistance JA Junction to Ambient  Thermal Resistance JC Junction to ...

Page 8

Si5356 2. Typical Application Circuits +3.3 V 0.1 uF Power Supply Decoupling Capacitors (1 per VDD or VDDOx pin) 25 MHz XTAL +3. Bus ...

Page 9

Functional Description 3.1. Overview 2 The Si5356 is a highly flexible programmable clock generator capable of synthesizing four independent frequencies up to 200 MHz. The device has four banks of outputs with each bank supporting two CMOS ...

Page 10

Si5356 Si5356 XA XTAL XB Figure 1. Connecting an XTAL to the Si5356 For synchronous timing applications, the Si5356 can lock 200 MHz CMOS reference clock. A typical interface circuit is shown in Figure 2. A ...

Page 11

... Configuration to NVM”). Second, custom factory- programmed Si5356 devices are available that include a user-specified (example part number Si5356A-Axxxxx-GM). 3.5.1. Ordering a Custom NVM Configuration The Si5356 is orderable with a factory-programmed custom NVM configuration. This is the simplest way of using the Si5356 since it generates the desired output ...

Page 12

... In this case, do not write the feedback Multisynth registers. Instead, only write the set of registers associated with the output MultiSynth divider of interest (see “AN565: Configuring the Si5356A”). To avoid intermediate frequencies recommended that the output to be modified is disabled before changing the divider ratios (see AN565 for a description of Register 230) ...

Page 13

CMOS Output Drivers The Si5356 has 4 banks of outputs with each bank comprised of 2 clocks for a total of 8 CMOS outputs per device. By default, each bank of CMOS output clocks are in-phase. Alternatively, each output ...

Page 14

Si5356 2 3.10 Interface The Si5356 control interface is a 2-wire bus for bidirectional communication. The bus consists of a bidirectional serial data line (SDA) and a serial clock input (SCL). The device operates as a slave device ...

Page 15

Spread Spectrum To reduce electro magnetic interference (EMI), the Si5356 supports spread spectrum modulation. The output clock frequencies can be modulated to spread energy across a broader range of frequencies, lowering system EMI. The modulation rate is the time ...

Page 16

Si5356 3.12. Power Supply Considerations The Si5356 has two core supply voltage pins ( enabling the device to be used in mixed supply applications. The Si5356 does not require ferrite beads for DDOD power supply filtering. The device ...

Page 17

... ClockBuilder™ Desktop Software" on page 9). However, for customers interested in using the Si5356 in operating modes beyond the capabilities available with ClockBuilder, refer to “AN565: Configuring the Si5356A” for a detailed description of the Si5356 registers and their usage. Also refer to “AN428: Jump Start: In-System, Flash-Based Programming for Silicon Labs’ ...

Page 18

Si5356 5. Pin Descriptions: Si5356 XA XB I2C_LSB CLKIN SSC_DIS OEB Note: Center pad must be tied to GND for normal operation. Pin # Pin Name I External Crystal MHz crystal is ...

Page 19

Table 8. Si5356 Pin Descriptions (Continued) 5 SSC_DIS I Spread Spectrum Disable. This pin allows disabling of the spread spectrum feature on the output clocks. Connect to 1 disable spread spectrum on all outputs. Connect to GND to ...

Page 20

Si5356 Table 8. Si5356 Pin Descriptions (Continued) 20 VDDOA VDD Clock Output Bank A Supply Voltage. Power supply for clock outputs 0 and 1. May be operated from a 1.8, 2.5, or 3.3 V sup- ply. A 0.1 μF bypass ...

Page 21

... R = Tape & Reel (ordering option) When ordering non-tape & reel shipment media, contact your sales representative for more information. Preliminary Rev. 0.3 Si5356 product revision xxxxx = 5-digit custom code assigned to each unique device configuration. Leave xxxxx blank for standard factory default configuration (Si5356A-A-GMR) 21 ...

Page 22

Si5356 7. Package Outline: 24-Lead QFN Figure 11. 24-Lead Quad Flat No-Lead (QFN) Dimension aaa bbb ccc ddd eee Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. ...

Page 23

Recommended PCB Layout Dimension Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based ...

Page 24

... Si5356 9. Top Marking Line Characters Si5356A Line 1 Xxxxxx Line 2 RTTTTT Line 3 Circle with 0. mm diameter; Line 4 left-justified YYWW 24 Si5356 Xxxxxx RTTTTT YYWW Description Base part number Frequency and configuration code (e.g etc.) xxxxx = Optional NVM code for custom factory-programmed devices; (characters are not included for blank devices). ...

Page 25

OCUMENT HANGE IST Revision 0.1 to Revision 0.2 Improved specification details on input signals.  Added phase and cycle-cycle jitter specifications.  Added thermal resistance junction to case.  Improved application circuits.  Added GND via requirement ...

Page 26

... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and ClockBuilder are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...

Related keywords