ADF4117BRU Analog Devices Inc, ADF4117BRU Datasheet - Page 3

• Manufacturer Part Number: ADF4117BRU
• Description: IC PLL FREQ SYNTHESIZER 16-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4117BRU

• Rohs Status: RoHS non-compliant
• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 1.2GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 1.2GHz

SPECIFICATIONS
AV
noted; dBm referred to 50 Ω.
Table 1.
Parameter
RF CHARACTERISTICS
REF
PHASE DETECTOR FREQUENCY
CHARGE PUMP
LOGIC INPUTS
LOGIC OUTPUTS
RF Input Sensitivity
RF Input Frequency
Maximum Allowable Prescaler
Reference Input Frequency
Reference Input Sensitivity
REF
REF
I
I
Sink and Source Current Matching
V
V
I
C
Reference Input Current
V
V
CP
CP
INH
DD
IN
INH
INL
OH
OL
IN
Sink/Source
Three-State Leakage Current
ADF4116
ADF4117
ADF4118
Output Frequency
High Value
Low Value
Absolute Accuracy
I
I
, Input Capacitance
/I
CHARACTERISTICS
, Output Low Voltage
CP
CP
, Input Low Voltage
, Output High Voltage
= DV
IN
IN
, Input High Voltage
INL
Input Capacitance
Input Current
vs. V
vs. Temperature
, Input Current
DD
CP
= 3 V ± 10%, 5 V ± 10%; AV
3
4,5
5
B Version
−15 to 0
−10 to 0
80 to 550
45 to 550
0.1 to 1.2
0.1 to 3.0
0.2 to 3.0
165
200
5 to 100
0.4 to AV
0.7 to AV
10
±100
55
1
250
2.5
3
1
3
2
2
0.8 × DV
0.2 × DV
±1
10
±100
DV
0.4
DD
DD
≤ V
− 0.4
DD
DD
P
DD
DD
1
≤ 6.0 V; AGND = DGND = CPGND = 0 V; T
Y Version
−10 to 0
−10 to 0
0.1 to 3.0
165
200
5 to 100
0.4 to AV
0.7 to AV
10
±100
55
1
250
2.5
25
16
3
2
2
0.8 × DV
0.2 × DV
± 1
10
± 100
DV
0.4
DD
Rev. D | Page 3 of 28
− 0.4
DD
DD
DD
DD
2
Unit
dBm min to max
dBm min to max
MHz min to max
MHz min to max
GHz min to max
GHz min to max
GHz min to max
MHz max
MHz max
MHz min to max
V p-p min to max
V p-p min to max
pF max
μA max
MHz max
mA typ
μA typ
% typ
nA max
nA typ
% typ
% typ
% typ
V min
V max
μA max
pF max
μA max
V min
V max
Test Conditions/Comments
AV
AV
See Figure 26 for input circuit
Input level = −8 dBm; for lower frequencies,
ensure slew rate (SR) > 36 V/μs
Input level = −10 dBm
Input level = −15 dBm
AV
AV
For f < 5 MHz, ensure SR > 100 V/μs
AV
For f ≥ 10 MHz, AV
0.5 V ≤ V
0.5 V ≤ V
V
I
I
OH
OL
CP
DD
DD
DD
DD
DD
= 500 μA
= 500 μA
ADF4116/ADF4117/ADF4118
= V
, DV
, DV
= 3 V
= 5 V
= 3.3 V, biased at AV
A
P
/2
= T
CP
CP
DD
DD
≤ V
≤ V
= 3 V
= 5 V
MIN
P
P
− 0.5
− 0.5
to T
DD
MAX
= 5 V, biased at AV
, unless otherwise
DD
/2
DD
/2