IDT2309A-1HPGI IDT, Integrated Device Technology Inc, IDT2309A-1HPGI Datasheet - Page 3

• Manufacturer Part Number: IDT2309A-1HPGI
• Description: IC CLK BUFFER ZD HI DRV 16-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay Bufferr

Specifications of IDT2309A-1HPGI

• Pll: Yes with Bypass
• Input: LVTTL
• Output: LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 1:9
• Differential - Input:output: No/No
• Frequency - Max: 133MHz
• Divider/multiplier: No/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 133MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 2309A-1HPGI

FUNCTION TABLE
NOTES:
1. H = HIGH Voltage Level.
2. This output is driven and has an internal feedback for the PLL. The load on this ouput can be adjusted to change the skew between the REF and the output.
DC ELECTRICAL CHARACTERISTICS - COMMERCIAL
OPERATING CONDITIONS - COMMERCIAL
SWITCHING CHARACTERISTICS (2309A-1) - COMMERCIAL
NOTES:
1. REF Input has a threshold voltage of V
2. All parameters specified with loaded outputs.
IDT2309A
3.3V ZERO DELAY CLOCK BUFFER
Symbol
Symbol
Symbol
L = LOW Voltage Level
t
LOCK
I
t
t
DD_PD
V
t
t
t
t
6A
6B
t
t
V
V
C
C
T
1
3
4
5
7
J
V
V
I
DD
I
I
DD
A
IH
OH
IL
OL
L
IN
IH
IL
S2
H
H
L
L
Output Frequency
Duty Cycle = t
Rise Time
Fall Time
Output to Output Skew
Delay, REF Rising Edge to CLKOUT Rising Edge
Delay, REF Rising Edge to CLKOUT Rising Edge
Device-to-Device Skew
Cycle-to-Cycle Jitter
PLL Lock Time
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance < 100MHz
Load Capacitance 100MHz - 133MHz
Input Capacitance
Parameter
Input LOW Voltage Level
Input HIGH Voltage Level
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Power Down Current
Supply Current
2
÷ t
Parameter
Parameter
1
S1
H
H
L
L
(1)
DD
/2.
Tri-State
V
V
Standard Drive
High Drive
Standard Drive
High Drive
REF = 0MHz (S2 = S1 = H)
Unloaded Outputs at 66.66MHz, SEL inputs at V
Driven
Driven
Driven
CLKA
IN
IN
= V
= 0V
DD
(2)
(2)
10pF Load
30pF Load
Measured at 1.4V, F
Measured between 0.8V and 2V
Measured between 0.8V and 2V
All outputs equally loaded
Measured at V
Measured at V
Measured at V
Measured at 66.66MHz, loaded outputs
Stable power supply, valid clock presented on REF pin
Conditions
Tri-State
Tri-State
DD
DD
3
DD
Driven
Driven
CLKB
/2
/2 in PLL bypass mode (IDT2309A only)
/2 on the CLKOUT pins of devices
OUT
Conditions
I
I
I
I
OL
OL
OH
OH
= 66.66MHz
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
= 12mA (-1H)
= 8mA
= -8mA
= -12mA (-1H)
CLKOUT
DD
Driven
Driven
Driven
Driven
or GND
(2)
Min.
—
—
—
3
0
(1,2)
Output Source
Min.
2.4
—
—
—
—
—
—
Min.
2
10
10
40
—
—
—
—
—
—
—
1
REF
PLL
PLL
PLL
Max.
3.6
70
30
10
7
Typ.
—
—
50
—
—
—
—
—
0
5
0
Max.
PLL Shut Down
100
0.8
0.4
—
50
—
12
32
±350
Max.
133
100
250
700
200
2.5
2.5
8.7
60
1
N
N
N
Y
Unit
°
pF
pF
V
C
MHz
Unit
ms
%
ns
ns
ps
ps
ns
ps
ps
Unit
mA
μA
μA
μA
V
V
V
V