MAX9485ETP+ Maxim Integrated Products, MAX9485ETP+ Datasheet - Page 12

IC CLOCK GENERATOR AUD 20-TQFN

MAX9485ETP+

Manufacturer Part Number
MAX9485ETP+
Description
IC CLOCK GENERATOR AUD 20-TQFN
Manufacturer
Maxim Integrated Products
Type
Clock Generatorr
Datasheet

Specifications of MAX9485ETP+

Pll
Yes
Input
LVCMOS, LVTTL, Crystal
Output
LVCMOS, LVTTL
Number Of Circuits
1
Ratio - Input:output
1:3
Differential - Input:output
No/No
Frequency - Max
73.728MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TQFN Exposed Pad
Frequency-max
73.728MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Programmable Audio Clock Generator
When using the MAX9485’s internal VCXO with an
external crystal, connect the crystal to X1 and X2.
Choose an AT-cut crystal that oscillates at 27MHz on its
fundamental mode with ±30ppm. Use a crystal shunt
capacitance less than 12pF, including board parasitic
capacitance. Choose an oscillator with a load capaci-
tance less than 14pF to achieve ±200ppm pullability.
Note: Pulling range may vary depending on the crystal
used. Refer to the MAX9485 Evaluation Kit for details.
Figure 7. 2-Wire Serial Interface
Figure 8. CLK_OUT, MCLK Rise and Fall Time
12
t
CLK_OUT, MCLK
HD, STA
SDA
SCL
RISE AND FALL TIME MEASURED BETWEEN 20% AND 80%.
______________________________________________________________________________________
CONDITION
START
(t
R1
, t
20%
MR
Applications Information
)
80%
t
LOW
t
R
t
SU, DAT
t
HIGH
80%
t
F
(t
20%
F1
Crystal Selection
, t
MF
t
)
HD, DAT
t
SU, STA
REPEATED START
CONDITION
Figure 9. VCXO and PLL Settling Time
CLK_OUT1
CLK_OUT2
2.2V
MCLK
t
V
HD, STA
SDA
TUN
OR
V
DD
t
PO1
t
PO2
t
SU, STO
STOP PULSE AFTER WRITING STOP EDGE
t
TUN
CONDITION
STOP
t
FST
t
BUF
CONDITION
t
START

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