DS1007S-12 Maxim Integrated Products, DS1007S-12 Datasheet - Page 5

• Manufacturer Part Number: DS1007S-12
• Description: DELAY LINE 7TAP 3NS 16-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS1007S-12

• Function: Multiple
• Delay To 1st Tap: 3nS
• Available Total Delays: 3 ~ 10ns, 9 ~ 40ns
• Number Of Independent Delays: 7
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Taps/steps: -
• Tap Increment: -

NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. V
4. See Test Conditions below.
5. All output delays in the same speed output tend to vary unidirectionally with temperature or voltage
6. Period specifications may be exceeded; however, accuracy will be application-sensitive (decoupling,
7. t
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of the corresponding output pulse.
TEST SETUP DESCRIPTION
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1007.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected between the input and each output. Each
output is selected and connected to the counter by a VHF switch control unit. All measurements are fully
automated, with each instrument controlled by a central computer over an IEEE 488 bus.
WI
RISE
FALL
PLH
range (i.e., if Out 2 slows down, all other outputs also slow down).
layout, etc.).
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
PU
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
CC
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
= 0 ms for Out 1 through Out 4.
= 5V @25 C. Delays accurate on rising edges within 2 ns.
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DS1007