LTC6990IS6#TRPBF Linear Technology, LTC6990IS6#TRPBF Datasheet - Page 12

• Manufacturer Part Number: LTC6990IS6#TRPBF
• Description: IC MPU SUPERVISORY TSOT23-6
• Manufacturer: Linear Technology

Specifications of LTC6990IS6#TRPBF

• Frequency: *
• Voltage - Supply: *
• Current - Supply: 235µA
• Operating Temperature: *
• Package / Case: TSOT-23-6, TSOT-6
• Count: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OPERATION
LTC6990
On start-up, the DIV pin A/D converter must determine the
correct DIVCODE before the output is enabled. If V
not stable, it will increase the start-up time as the converter
waits for a stable result. Therefore, capacitance on the DIV
pin should be minimized so it will settle quickly. Less than
100pF will not affect performance.
Output Enable
The OE pin controls the state of the LTC6990’s output as
seen on the OUT pin. Pulling the OE pin high enables the
oscillator output. Pulling it low disables the output. When
the output is disabled, it is either held low or placed in
a high impedance state as dictated by the Hi-Z bit value
(determined by the DIVCODE as described earlier). Table 2
summarizes the output control states.
Table 2. Output States
12
OE Pin
1
0
0
OUT
OUT
OE
Hi-Z
OE
X
1
0
Hi-Z
Enabled, Output is Active
Disabled, Output is Hi-Z
Disabled, Output is Held Low
t
ENABLE
t
ENABLE
t
PD
OUT
t
Figure 4. OE Timing Diagram (Hi-Z = 1)
Figure 3. OE Timing Diagram (Hi-Z = 0)
OUT
t
OUT
DIV
t
PD
t
PD
is
t
ENABLE
t
ENABLE
Figure 3 illustrates the timing for the OE function when
Hi-Z = 0. When OE is low, the output is disabled and OUT
is held low. Bringing OE high enables the output after a
delay, t
sliver pulses and guarantee the correct width for the fi rst
pulse. If N
the output period, t
twice the internal master oscillator period (or 2 • t
Forcing OE low will bring OUT low after a propagation
delay, t
pulse will be truncated.
As shown in Figure 4, setting Hi-Z = 1 places the output in
a high-impedance state when OE = 0. This feature allows
for “wired-OR” connections of multiple devices. Driving OE
high enables the output. The output will usually be forced
low during this time, although it is possible for OUT to
transition directly from high-impedance to a high output,
depending on the timing of the OE transition relative to
the internal oscillator. Once high, the fi rst output pulse
will have the correct width (unless truncated by bringing
OE low again).
ENABLE
PD
. If the output is high when OE falls, the output
DIV
t
PD
, which synchronizes the enable to eliminate
= 1 or 2 this delay will be no longer than
OUT
. If N
DIV
> 2 the delay is limited to
t
t
PD
PD
6990 F03
6990 F04
MASTER
6990f
).