DS17285S-5+ Maxim Integrated Products, DS17285S-5+ Datasheet - Page 20

IC RTC 5V 2K NV RAM 24-SOIC

DS17285S-5+

Manufacturer Part Number
DS17285S-5+
Description
IC RTC 5V 2K NV RAM 24-SOIC
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of DS17285S-5+

Memory Size
16K (2K x 8)
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The extended functions provided by the DS17x85/
DS17x87 that are new to the RAMified RTC family are
accessed by a software-controlled bank-switching
scheme, as illustrated in Table 5. In bank 0, the
clock/calendar registers and 50 bytes of user RAM are
in the same locations as for the DS1287. As a result,
existing routines implemented within BIOS, DOS, or
application software packages can gain access to the
DS17x85/DS17x87 clock registers with no changes.
Also in bank 0, an extra 64 bytes of RAM are provided
at addresses just above the original locations for a total
of 114 directly addressable bytes of user RAM.
When bank 1 is selected, the clock/calendar registers
and the original 50 bytes of user RAM still appear as
bank 0. However, the extended registers that provide
control and status for the extended functions are
accessed in place of the additional 64 bytes of user
RAM. The major extended functions controlled by the
extended registers are listed below:
• 64-Bit Silicon Serial Number
• Century Counter
• RTC Write Counter
• Date Alarm
• Auxiliary Battery Control/Status
• Wake-Up
Real-Time Clocks
Figure 5. CRC Polynomial
20
____________________________________________________________________
STAGE
1ST
X
0
STAGE
2ND
X
1
Extended Functions
STAGE
3RD
X
2
STAGE
4TH
X
3
POLYNOMIAL = X
X
4
8
+ X
STAGE
5
5TH
+ X
• Kickstart
• RAM Clear Control/Status
• Extended RAM Access
The bank selection is controlled by the state of the DV0
bit in register A. To access bank 0 the DV0 bit should
be written to a 0. To access bank 1, DV0 should be
written to 1. Register locations designated as reserved
in the bank 1 map are reserved for future use by Dallas
Semiconductor. Bits in these locations cannot be writ-
ten and return a 0 if read.
A unique 64-bit lasered serial number is located in
bank 1, registers 40h–47h. This serial number is divid-
ed into three parts. The first byte in register 40h con-
tains a model number to identify the device type of the
DS17x85/DS17x87. Registers 41h–46h contain a
unique binary number. Register 47h contains a CRC
byte used to validate the data in registers 40h–46h. The
CRC polynomial is X
bytes of the serial number are read-only registers. The
DS17x85/DS17x87 is manufactured such that no two
devices contain an identical number in locations
41h–47h.
4
+ 1
DS17285/87
DS17485/87
DS17885/87
X
DEVICE
5
STAGE
6TH
X
6
Silicon Serial Number
8
+ X
INPUT DATA
5
STAGE
+ X
7TH
X
7
4
+ 1. See Figure 5. All 8
MODEL NUMBER
STAGE
8TH
X
8
72h
74h
78h

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