DS1670S+ Maxim Integrated Products, DS1670S+ Datasheet - Page 7

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DS1670S+

Manufacturer Part Number
DS1670S+
Description
IC CTRLR SYSTEM PORTABLE 20SOIC
Manufacturer
Maxim Integrated Products
Type
Portable System Controllerr
Datasheet

Specifications of DS1670S+

Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
3-Wire Serial
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
 Details
The DS1670 nonvolatilizes the external SRAM(s) by write protecting the SRAM(s) and by providing a
back-up power supply in the absence of V
external SRAM(s) are prohibited by forcing
and
up, access is prohibited until the end of t
EXTERNAL SRAM CHIP ENABLE Table 3
EXTERNAL SRAM INTERFACE (WORD-WIDE) TO THE DS1670 Figure 4
MICROPROCESSOR MONITOR
The DS1670 monitors three vital conditions for a microprocessor: power supply, software execution, and
external override.
First, a precision temperature-compensated reference and comparator circuit monitors the status of V
When an out-of-tolerance condition occurs, an internal power-fail signal is generated which forces the
power-fail trip point is 2.88V (typical). When V
the reset signal is kept in the active state for 250ms (typical) to allow the power supply and
microprocessor to stabilize. Note, however, that if the
during battery-backup mode), the reset signal will be kept in an active state for 250ms plus the startup
time of the oscillator.
The second monitoring function is pushbutton reset control. The DS1670 provides for a pushbutton
switch to be connected to the RST output pin. When the DS1670 is not in a reset cycle, it continuously
monitors the
RST
CEI
0
0
0
0
1
BHE
pin to the active state, thus warning a processor-based system of impending power failure. The
. Also at this point, the SRAM power supply (V
BHE
X
0
0
1
1
RST
signal for a low-going edge. If an edge is detected, the DS1670 will debounce the
BLE
X
0
1
0
1
CEOL
0
1
0
1
1
RPU
CEOH
.
CEOL
CC
0
0
1
1
1
. When V
CC
7 of 16
and
Word Transfer
Byte Transfer in upper half of data bus (D15-D8)
Byte Transfer in lower half of data bus (D7-D0)
External SRAMs disabled
External SRAMs disabled
returns to an in-tolerance condition upon power-up,
EOSC
CEOH
CCO
CC
) is switched from V
bit is set to a logic 1 (to disable the oscillator
falls below 2.88V (typical), access to the
high regardless of the level of
FUNCTION
CC
to V
BAT
. Upon power-
CEI
DS1670
,
BLE
CC
,
.

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