DS1392U-18+ Maxim Integrated Products, DS1392U-18+ Datasheet - Page 18

• Manufacturer Part Number: DS1392U-18+
• Description: IC RTC W/CHARGER 10-USOP
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/Trickle-Chargerr

Specifications of DS1392U-18+

• Time Format: HH:MM:SS:hh (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.71 V ~ 1.89 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -

Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
The INTCN bit used in the DS1390/DS1393/DS1394
becomes the SQW pin-enable bit in the DS1392. This
Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit
indicates that the oscillator has stopped or was
stopped for some time and may be used to judge the
validity of the clock and calendar data. This bit is
edge-triggered and is set to logic 1 when the internal
circuitry senses the oscillator has transitioned from a
normal run state to a STOP condition. The following are
examples of conditions that can cause the OSF bit to
be set:
This bit remains at logic 1 until written to logic 0. This
bit can only be written to logic 0. Attempting to write
OSF to logic 1 leaves the value unchanged.
Bit 6: Alarm Flag (AF). A logic 1 in the AF bit indicates
that the time matched the alarm registers. If the AIE bit
Table 5. Trickle-Charge Register
18
TCS3
X
X
X
1
1
1
1
1
1
0
EOSC
BIT 7
BIT 7
1) The first time power is applied.
2) The voltage present on V
3) The EOSC bit is turned off.
4) External influences on the crystal (i.e., noise,
OSF
____________________________________________________________________
insufficient to support oscillation.
leakage, etc.).
TCS2
X
X
X
0
0
0
0
0
0
0
BIT 6
BIT 6
0
0
TCS1
X
X
X
1
1
1
1
1
1
0
TCS0
X
X
X
0
0
0
0
0
0
0
BBSQI
BIT 5
BIT 5
CC
0
and V
DS1
X
0
1
0
1
0
1
0
1
0
BACKUP
BIT 4
BIT 4
RS2
0
DS0
0
1
X
1
0
1
0
1
0
0
is
ROUT1
bit powers up a zero, making SQW active.
is logic 1 and the INTCN bit is set to logic 1, the
SQW/INT pin is also asserted. AF is cleared when writ-
ten to logic 0. This bit can only be written to logic 0.
Attempting to write to logic 1 leaves the value
unchanged.
The simplified schematic in Figure 8 shows the basic
components of the trickle charger. The trickle-charge
select (TCS) bits (bits 4 to 7) control the selection of
the trickle charger. To prevent accidental enabling,
only a pattern on 1010 enables the trickle charger. All
other patterns disable the trickle charger. The trickle
charger is disabled when power is first applied. The
diode-select (DS) bits (bits 2 and 3) select whether or
not a diode is connected between V
If DS is 01, no diode is selected or if DS is 10, a diode
is selected. The ROUT bits (bits 0 and 1) select the
value of the resistor connected between V
V
resistor-select (ROUT) bits and the diode selected by
the diode-select (DS) bits.
X
X
0
0
0
1
1
1
1
0
BACKUP
BIT 3
BIT 3
Trickle-Charge Register (0F/8Fh)
RS1
0
ROUT0
. Table 5 shows the resistor selected by the
X
X
0
1
1
0
0
1
1
0
Control Register (0D/8Dh) (DS1392 Only)
Disabled
Disabled
Disabled
No diode, 250Ω resistor
One diode, 250Ω resistor
No diode, 2kΩ resistor
One diode, 2kΩ resistor
No diode, 4kΩ resistor
One diode, 4kΩ resistor
Initial default value—disabled
ESQW
BIT 2
BIT 2
0
Status Register (0E/8Eh)
FUNCTION
BIT 1
BIT 1
0
0
CC
and V
BIT 0
BIT 0
BACKUP
AIE
CC
AF
and
.