DS1284 Maxim Integrated Products, DS1284 Datasheet
DS1284
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DS1284 Summary of contents
Page 1
... The date at the end of the month is automatically adjusted for months with fewer than 31 days, including correction for leap year. The DS1284/DS1286 operate in either 24-hour or 12- hour format with an AM/PM indicator. The devices provide alarm windows and interval timing between ...
Page 2
... OE rather than address access. OPERATION—WRITE REGISTERS The DS1284/DS1286 are in the write mode whenever the WE and CE signals are in the active-low state after the address inputs are stable. The latter occurring falling edge determines the start of the write cycle. The write cycle is terminated by the earlier rising edge WE. All address inputs must be kept valid throughout the write cycle ...
Page 3
... If active-high output operation is selected, a pulldown resistor is required for proper operation. When active- low output operation is selected, a pullup resistor is required for proper operation. WE Active-Low Write-Enable Input DS1284/DS1286 FUNCTION ) of 6pF. The crystal is connected L is not applied. CC pin. A diode must not be placed BAT pin ...
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... Registers Registers Watchdog Alarm Hundredths of Internal Counters Data I/O Buffers DQ0–DQ7 DS1284/DS1286 FUNCTION , read and writes are inhibited BAT Power Switch GND INT N Swap pins WD INT V CC IBH P 100Hz External N Seconds DS1284/DS1286 DS1286 only 1024Hz SQW INTA INTB / (INTB) ...
Page 5
... This produces a 100Hz output that is slightly off during the short term, and is exactly correct every 250ms. The divide ratio is given by: Thus, the long-term average frequency output is exactly 100Hz. Figure 2. Watchdog Timekeeper Registers Ratio = [ 40. DS1284/DS1286 ...
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... Time-of-day alarm registers are written and read in the same format as the time-of-day registers. The time-of-day alarm flag and interrupt is always cleared when alarm registers are read or written DS1284/DS1286 ...
Page 7
... Bit 2: Time-of-Day Alarm Mask (TDM). When this bit is written to logic 1, the time-of-day alarm- interrupt output is deactivated regardless of the state of TDF. When TDM is set to logic 0, the time-of-day BIT 5 BIT 4 BIT 3 IBH PU/LVL WAM DS1284/DS1286 BIT 2 BIT 1 BIT 0 TDM WAF TDF ...
Page 8
... The TDM bit has no effect on the operation of this bit. Figure 3. Time-of-Day Alarm Mask Bits REGISTER (03h) (05h) MINUTES HOURS (07h) DAYS 1 Alarm once per minute 1 Alarm when minutes match 1 Alarm when hours and minutes match 0 Alarm when hours, minutes, and days match DS1284/DS1286 FUNCTION ...
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... BAT SYMBOL MIN -1.0 LIO CCS1 I CCS2 I CC 1.088 BAT = 0°C to +70°C.) A SYMBOL MIN I BAT DS1284/DS1286 TYP MAX UNITS NOTES 5.0 5 0.3 +0.8 V 3.0 3.5 V TYP MAX UNITS NOTES A +1.0 A +1.0 A +1 3.0 7 ...
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... Data Setup Time Data Hold Time INTA, INTB Pulse Width SYMBOL MIN TYP OUT C 7 I/O SYMBOL MIN TYP t 150 RC t ACC COE 150 WC t 140 ODW t 10 OEW IPW DS1284/DS1286 MAX UNITS NOTES MAX UNITS NOTES ns 1 150 ns 150 4,5 ms 11,12 ...
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... READ CYCLE (NOTE 1) WRITE CYCLE 1 (NOTES DS1284/DS1286 ...
Page 12
... WRITE CYCLE 2 (NOTES 2, 8) TIMING DIAGRAM: INTERRUPT OUTPUTS PULSE MODE (NOTES 11, 12 DS1284/DS1286 ...
Page 13
... A PARAMETER Expected Data-Retention Time (DS1286) WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery-backup mode. SYMBOL MIN 350 100 REC SYMBOL MIN DS1284/DS1286 TYP MAX UNITS NOTES s s s 150 ns TYP MAX UNITS NOTES years 9 ...
Page 14
... low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high-impedance state during this period. 9. Each DS1284/DS1286 is marked with a four-digit date code AABB. AA designates the year of manufacture. BB designates the week of manufacture. The expected t date of manufacture. ...
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... SQW GND CE 20 DQ7 19 DQ0 DQ6 18 17 DQ1 DQ5 16 DQ4 DQ2 15 DQ3 GND BAT RCLR SQW 23 7 DS1284 GND DQ0 DQ7 PLCC DS1284/DS1286 DS1286 INTB (INTB N. N. SQW N. DQ7 11 18 DQ6 12 17 DQ5 13 16 DQ4 14 15 DQ3 EDIP (720 mils) ...
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... A IN. 0.300 BSC MM 7.62 B IN. 0.442 MM 17.68 D IN. 0.480 MM 12.2 D2 IN. 0.390 MM 9.91 E IN. 0.090 MM 2.29 E2 IN. 0.390 MM 9.91 F IN. 0.015 MM 0.38 H IN. 0.100 MM 2. DS1284/DS1286 MAX 0.462 11.73 0.500 12.7 0.430 10.92 0.120 3.05 0.430 10.92 0.020 0.518 0.020 0.518 ...
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... PACKAGE INFORMATION (continued) PKG 28-PIN DIP DIM MIN A IN. 1.445 MM B IN. 0.530 MM C IN. 0.140 MM D IN. 0.600 MM E IN. 0.015 MM F IN. 0.120 MM G IN. 0.090 MM H IN. 0.625 MM J IN. 0.008 MM K IN. 0.015 DS1284/DS1286 MAX 1.470 0.550 0.160 0.625 0.040 0.145 0.110 0.675 0.012 0.022 ...
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... IN. MM NOTE: PINS 2, 3, 21, 24, AND 25 ARE MISSING BY DESIGN © 2006 Maxim Integrated Products DS1284/DS1286 28-PIN EDIP MIN MAX 1.520 1.540 38.61 39.12 0.695 0.720 17.65 18.29 0.350 0.375 8.89 9.52` 0.100 0.130 2.54 3.30 0.015 0.030 ...