MAXQ3181-RAN+ Maxim Integrated Products, MAXQ3181-RAN+ Datasheet - Page 31

IC AFE POLYPHASE LO-PWR 28-TSSOP

MAXQ3181-RAN+

Manufacturer Part Number
MAXQ3181-RAN+
Description
IC AFE POLYPHASE LO-PWR 28-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAXQ3181-RAN+

Number Of Channels
8
Power (watts)
35mW
Voltage - Supply, Analog
3.3V
Voltage - Supply, Digital
3.3V
Package / Case
28-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Bits
-
The interrupt request flag register contains bits that indicate the reason the IRQ pin has become active. The active
bit must be cleared by the host to avoid continuing firing of the interrupt by the MAXQ3181.
Bit:
Name:
Reset:
Bit:
Name:
Reset:
13, 7:3
BIT
15
14
12
11
10
9
8
2
1
0
DSPRDY
CHSCH
DSPOR
NAME
Low-Power, Active Energy, Polyphase AFE
DCHA
NOZX
PWRF
EOVF
OC
UV
OV
DSPOR
______________________________________________________________________________________
15
0
7
0
When set, the DSP was unable to complete processing one cycle when another cycle was due to
begin. This indicates that the R_ADCRATE is set too low, and that samples are arriving more quickly
than they can be processed. Increase the value of the R_ADCRATE register to reduce the load on the
DSP.
When set, the latest DSP cycle has just completed.
Reserved.
When set, the direction of real energy flow has changed (that is, from toward the load to away from the
load, or from away from the load to toward the load).
When set, the MAXQ3181 has failed to detect zero crossings on one or more voltage channels for the
time defined by the NZX_TIMO register.
When set, the absolute instantaneous voltage level in one or more voltage channels failed to exceed
the trip level set in the UVLVL (Undervoltage Level) register for one DSP cycle.
When set, the absolute instantaneous voltage level in one or more voltage channels has exceeded the
trip level set in the OVLVL (Overvoltage Level) register.
When set, the absolute instantaneous current in one or more current channels has exceeded the trip
level set in the OCLVL (Overcurrent Level) register.
When set, one or more energy accumulators have an MSB overflow condition.
When set, indicates a change of the CHKSUM. The CHKSUM is computed over the configuration and
calibration data. The host should review a change in CHKSUM because any change in the
configuration or calibration data affects the metering operation and accuracy.
When set, a power-supply failure is imminent and the supervisory processor should begin taking steps
to save its state and prepare for a loss of power.
DSPRDY
14
0
6
0
13
0
5
0
Interrupt Request Flag Register (IRQ_FLAG) (0x004)
DCHA
12
0
4
0
FUNCTION
NOZX
11
0
3
0
EOVF
Global Interrupt Registers
UV
10
0
2
0
CHSCH
OV
9
0
1
0
PWRF
OC
8
0
0
0
31

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