AD73311LAR-REEL Analog Devices Inc, AD73311LAR-REEL Datasheet - Page 2

• Manufacturer Part Number: AD73311LAR-REEL
• Description: IC ANALOG FRONT END 20-SOIC T/R
• Manufacturer: Analog Devices Inc

Specifications of AD73311LAR-REEL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Number Of Channels: 2
• Power (watts): 50mW
• Voltage - Supply, Analog: 3V
• Voltage - Supply, Digital: 3V
• Package / Case: 20-SOIC (7.5mm Width)

AD73311L–SPECIFICATIONS
Parameter
REFERENCE
ADC SPECIFICATIONS
DAC SPECIFICATIONS
REFCAP
REFOUT
Maximum Input Range at VIN
Nominal Reference Level at VIN
Absolute Gain
Gain Tracking Error
Signal to (Noise + Distortion)
Total Harmonic Distortion
Intermodulation Distortion
Idle Channel Noise
Crosstalk
DC Offset
Power Supply Rejection
Group Delay
Input Resistance at VIN
Maximum Voltage Output Swing
Nominal Voltage Output Swing (0 dBm0)
Output Bias Voltage
Absolute Gain
Gain Tracking Error
Signal to (Noise + Distortion)
Total Harmonic Distortion
Intermodulation Distortion
Idle Channel Noise
Crosstalk
Absolute Voltage, V
REFCAP TC
Typical Output Impedance
Absolute Voltage, V
Minimum Load Resistance
Maximum Load Capacitance
(0 dBm0)
PGA = 0 dB
PGA = 38 dB
PGA = 0 dB
PGA = 38 dB
PGA = 0 dB
PGA = 38 dB
Single-Ended
Differential
Single-Ended
Differential
PGA = 0 dB
PGA = 6 dB
PGA = 0 dB
PGA = 6 dB
4, 5
4
REFCAP
REFOUT
2, 4
2, 3
2
Min
1.08
1.08
1
–2.2
71
70
–20
1.08
–1.8
70
AD73311LA
1
Typ
1.2
50
145
1.2
1.578
–2.85
1.0954
–6.02
–0.6
–1.0
± 0.1
76
74
72
56
60
59
–85
–85
–82
–76
–100
+2
–84
25
45
1.578
–2.85
3.156
3.17
1.0954
–6.02
2.1909
0
1.2
–0.7
± 0.1
77
76
77
77
–80
–80
–76
–82
–100
(AVDD = DVDD = 2.7 V to 3.3 V; DGND = AGND = 0 V, f
F
S
= 8 kHz; T
Max
1.32
1.32
100
+1.0
–75
+25
1.32
+0.4
–70
A
= T
MIN
Unit
V
ppm/°C
Ω
V
kΩ
pF
V p-p
dBm
V p-p
dBm
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm0
dB
mV
dB
µs
kΩ
V p-p
dBm
V p-p
dBm
V p-p
dBm
V p-p
dBm
V
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm0
dB
to T
6
MAX
, unless otherwise noted.)
Test Conditions/Comments
0.1 µF Capacitor Required from
REFCAP to AGND2
Unloaded
Measured Differentially
Max Input = (1.578/1.2) × V
Measured Differentially
1.0 kHz, 0 dBm0
1.0 kHz, 0 dBm0
1.0 kHz, +3 dBm0 to –50 dBm0
Refer to Figure 5a
300 Hz to 3400 Hz
0 Hz to f
300 Hz to 3400 Hz; f
0 Hz to f
300 Hz to 3.4 kHz
0 Hz to f
300 Hz to 3.4 kHz
300 Hz to 3.4 kHz
PGA = 0 dB
PGA = 0 dB
ADC Input Signal Level: 1.0 kHz, 0 dBm0
DAC Input at Idle
PGA = 0 dB
Input Signal Level at AVDD and DVDD
Pins 1.0 kHz, 100 mV p-p Sine Wave
64 kHz Output Sample Rate
DMCLK = 16.384 MHz
PGA = 6 dB
Max Output = (1.578/1.2) × V
PGA = 6 dB
Max Output = 2 × ((1.578/1.2) × V
PGA = 6 dB
PGA = 6 dB
REFOUT Unloaded
1.0 kHz, 0 dBm0
1.0 kHz, +3 dBm0 to –50 dBm0
Refer to Figure 5b
300 Hz to 3.4 kHz Frequency Range
300 Hz to 3400 Hz; f
300 Hz to 3.4 kHz Frequency Range
300 Hz to 3400 Hz; f
PGA = 0 dB
PGA = 0 dB
ADC Input Signal Level: AGND; DAC
Output Signal Level: 1.0 kHz, 0 dBm0
SAMP
SAMP
SAMP
/2
/2; f
/2
SAMP
DMCLK
SAMP
SAMP
SAMP
= 64 kHz
= 16.384 MHz,
= 64 kHz
= 64 kHz
= 64 kHz
REFCAP
REFCAP
REFCAP