AD7730BNZ Analog Devices Inc, AD7730BNZ Datasheet - Page 6

• Manufacturer Part Number: AD7730BNZ
• Description: IC ADC TRANSDUCER BRIDGE 24-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD7730BNZ

• Data Interface: DSP, Serial, SPI™
• Number Of Bits: 24
• Sampling Rate (per Second): 1.2k
• Number Of Converters: 1
• Power Dissipation (max): 125mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Resolution (bits): 24bit
• Sampling Rate: 1.2kSPS
• Input Channel Type: Differential, Single Ended
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7730LEBZ - BOARD EVALUATION FOR AD7730EVAL-AD7730EBZ - BOARD EVAL FOR AD7730
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD7730/AD7730L
CURRENTS ALLOW THE USER
OUT OR GONE OPEN-CIRCUIT
MULTIPLEXER SWITCHES ONE OF
AMPLIFIER. THE MULTIPLEXER IS
A TWO-CHANNEL DIFFERENTIAL
TRANSDUCER HAS BURNT
THE TWO DIFFERENTIAL INPUT
BURNOUT CURRENTS
CONTROLLED VIA THE SERIAL
TO EASILY DETECT IF A
ANALOG MULTIPLEXER
CHANNELS TO THE BUFFER
TWO 100nA BURNOUT
SEE PAGE 25
SEE PAGE 24
INTERFACE
THAT CAN BE USED TO SWITCH
THE POLARITY OF THE BRIDGE
OUTPUTS PROVIDE SIGNALS
FOR AC-EXCITED BRIDGE
APPLICATIONS, THE ACX
EXCITATION VOLTAGE
AC EXCITATION
SEE PAGE 41
INPUT STAGE FOR THE ANALOG
INPUTS ALLOWING SIGNIFICANT
PRESENTS A HIGH IMPEDANCE
AIN2(+)/D1
AIN2(–)/D0
THE BUFFER AMPLIFIER
BUFFER AMPLIFIER
AIN1(+)
AIN1(–)
EXTERNAL SOURCE
VBIAS
ACX
IMPEDANCES
SEE PAGE 24
ACX
RECONFIGURED TO BECOME TWO
WHICH CAN BE PROGRAMMED
AV
OVER THE SERIAL INTERFACE
MUX
EXCITATION
OUTPUT DIGITAL PORT LINES
THE SECOND ANALOG INPUT
CLOCK
DD
OUTPUT DRIVERS
AC
CHANNEL CAN BE
SEE PAGE 33
UNIPOLAR AND FOUR BIPOLAR
AGND
Figure 2. Detailed Functional Block Diagram
AV
PROGRAMMABLE GAIN
DV
THE PROGRAMMABLE GAIN
AMPLIFIER ALLOWS FOUR
DD
INPUT RANGES FROM
DD
AGND
+10mV TO +80mV
AMPLIFIER
SEE PAGE 24
BUFFER
6-BIT
DAC
REF IN(–) REF IN(+)
REFERENCE DETECT
+/–
+
DGND
PGA
VOLTAGE TO BE EITHER ADDED
ANALOG INPUT SIGNAL BEFORE
AND CONTROL LOGIC
OR SUBTRACTED FROM THE
ALLOWS A PROGRAMMED
IT IS APPLIED TO THE PGA
SERIAL INTERFACE
MICROCONTROLLER
OFFSET/TARE DAC
POL
–6–
CALIBRATION
SEE PAGE 24
VOLTAGE CAN BE SELECTED TO
THE REFERENCE INPUT TO THE
OPERATION. THE REFERENCE
BE NOMINALLY +2.5V OR +5V
PART IS DIFFERENTIAL AND
FACILITATES RATIOMETRIC
MODULATOR
SIGMA-DELTA A/D CONVERTER
SIGMA-
DELTA
DIFFERENTIAL
REFERENCE
SEE PAGE 25
RDY
AD7730
REGISTER BANK
PROGRAMMABLE
GENERATION
DIGITAL
ALL FUNCTIONS ON THE PART AND
FILTER
THIRTEEN REGISTERS CONTROL
PROVIDE STATUS INFORMATION
CLOCK
RESET
AND CONVERSION RESULTS
ARCHITECTURE ENSURES 24 BITS
ARCHITECTURE ENSURES 24 BITS
REGISTER BANK
ENTIRE SIGMA DELTA. ADC CAN
BE CHOPPED TO REMOVE DRIFT
BE CHOPPED TO REMOVE DRIFT
ENTIRE SIGMA-DELTA ADC CAN
SEE PAGE 11
NO MISSING CODES. THE
NO MISSING CODES. THE
SIGMA-DELTA ADC
SIGMA DELTA ADC
THE SIGMA-DELTA
THE SIGMA DELTA
SEE PAGE 26
*SPI IS A TRADEMARK OF MOTOROLA, INC.
SEE PAGE
ERRORS
ERRORS
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
COMPATIBLE SERIAL INTERFACE
WHICH CAN BE OPERATED FROM
EXTERNALLY-APPLIED CLOCK OR
BY CONNECTING A CRYSTAL OR
PART CAN BE PROVIDED BY AN
CERAMIC RESONATOR ACROSS
SPI*-COMPATIBLE OR DSP-
FUNCTIONS ON THE PART
THE STANDBY MODE REDUCES
POWER CONSUMPTION TO 5 A
THE CLOCK SOURCE FOR THE
JUST THREE WIRES. ALL
THE SERIAL INTERFACE
SERIAL INTERFACE
CAN BE ACCESSED VIA
SETTLING TIME AND WHICH HAS
CLOCK OSCILLATOR
ALLOWS PROGRAMMING OF
OUTPUT UPDATE RATE AND
TWO STAGE FILTER THAT
STANDBY MODE
SEE PAGE 35
THE CLOCK PINS
PROGRAMMABLE
A FAST STEP MODE
SEE PAGE 32
SEE PAGE 33
DIGITAL FILTER
CIRCUIT
(SEE FIGURE 3)
SEE PAGE 26
REV. A