AD7712ARZ Analog Devices Inc, AD7712ARZ Datasheet

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AD7712ARZ

Manufacturer Part Number
AD7712ARZ
Description
IC ADC SIGNAL COND LC2MOS 24SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7712ARZ

Data Interface
Serial
Number Of Bits
24
Sampling Rate (per Second)
1.03k
Number Of Converters
1
Power Dissipation (max)
45mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Resolution (bits)
24bit
Sampling Rate
1.028kSPS
Input Channel Type
Differential
Supply Voltage Range - Digital
4.75V To 5.25V
Supply Current
4.5mA
Digital Ic Case Style
SOIC
Number Of Elements
1
Resolution
24Bit
Architecture
Delta-Sigma
Sample Rate
1.028KSPS
Input Polarity
Unipolar/Bipolar
Input Type
Voltage
Rated Input Volt
5/20/±5/±20V
Differential Input
Yes
Power Supply Requirement
Single/Dual
Single Supply Voltage (typ)
5/10V
Single Supply Voltage (min)
4.75V
Single Supply Voltage (max)
10.5V
Dual Supply Voltage (typ)
±5/-5/10V
Dual Supply Voltage (min)
±4.75V
Dual Supply Voltage (max)
-5.25/10.5V
Power Dissipation
52.5mW
Integral Nonlinearity Error
±0.003%FSR
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
24
Package Type
SOIC W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7712ARZ
Manufacturer:
AD
Quantity:
2
Part Number:
AD7712ARZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
GENERAL DESCRIPTION
The AD7712 is a complete analog front end for low frequency
measurement applications. The device has two analog input
channels and accepts either low level signals directly from a trans-
ducer or high level (± 4
digital word. It employs a sigma-delta conversion technique to
realize up to 24 bits of no missing codes performance. The low
level input signal is applied to a proprietary programmable gain
front end based around an analog modulator. The high level
analog input is attenuated before being applied to the same
modulator. The modulator output is processed by an on-chip
digital filter. The first notch of this digital filter can be programmed
via the on-chip control register, allowing adjustment of the filter
cutoff and settling time.
Normally, one of the channels will be used as the main channel
with the second channel used as an auxiliary input to periodi-
cally measure a second voltage. The part can be operated from a
single supply (by tying the V
input signals on the low level analog input are more positive
than –30 mV. By taking the V
vert signals down to –V
input, as well as the reference input, features differential input
capability.
The AD7712 is ideal for use in smart, microcontroller based
systems. Input channel selection, gain settings, and signal polar-
ity can be configured in software using the bidirectional serial
*Protected by U.S. Patent No. 5,134,401.
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FEATURES
Charge Balancing ADC
High Level and Low Level Analog Input Channels
Programmable Gain for Both Inputs
Low-Pass Filter with Programmable Filter Cutoffs
Ability to Read/Write Calibration Coefficients
Bidirectional Microcontroller Serial Interface
Internal/External Reference Option
Single- or Dual-Supply Operation
Low Power (25 mW typ) with Power-Down Mode
APPLICATIONS
Process Control
Smart Transmitters
Portable Industrial Instruments
24 Bits No Missing Codes
Gains from 1 to 128
Differential Input for Low Level Channel
(100 W typ)
0.0015% Nonlinearity
REF
V
REF
on this low level input. This low level
SS
SS
) signals, and outputs a serial
pin to AGND), provided that the
pin negative, the part can con-
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
port. The AD7712 also contains self-calibration, system calibra-
tion, and background calibration options, and allows the user to
read and to write the on-chip calibration registers.
CMOS construction ensures low power dissipation, and a hard-
ware programmable power-down mode reduces the standby power
consumption to only 100 µW typical. The part is available in a
24-lead, 0.3 inch wide, plastic and hermetic dual-in-line pack-
age (DIP), as well as a 24-lead small outline (SOIC) package.
PRODUCT HIGHLIGHTS
1. The low level analog input channel allows the AD7712 to
2. The AD7712 is ideal for microcontroller or DSP processor
3. The AD7712 allows the user to read and to write the on-chip
4. No missing codes ensures true, usable, 23-bit dynamic range
AIN1(–)
AIN1(+)
AIN2
accept input signals directly from a strain gage or transducer,
removing a considerable amount of signal conditioning. To
maximize the flexibility of the part, the high level analog
input accepts signals of ± 4
applications with an on-chip control register that allows
control over filter cutoff, input gain, channel selection, signal
polarity, and calibration modes.
calibration registers. This means that the microcontroller has
much greater control over the calibration procedure.
coupled with excellent ± 0.0015% accuracy. The effects of
temperature drift are eliminated by on-chip self-calibration,
which removes zero-scale and full-scale errors.
TP
AGND DGND
AV
AD7712
AV
ATTENUATION
DD
VOLTAGE
FUNCTIONAL BLOCK DIAGRAM
DD
DV
Signal Conditioning ADC
4.5 A
DD
M
U
X
V
SS
IN (–)
REF
A = 1 – 128
© 2004 Analog Devices, Inc. All rights reserved.
RFS
PGA
IN (+)
REF
TFS
REGISTER
CONTROL
MODE SDATA SCLK
CHARGE-BALANCING A/D
SERIAL INTERFACE
AUTO-ZEROED
MODULATOR
V
BIAS
V
REF
CONVERTER
/GAIN.
GENERATION
2.5V REFERENCE
CLOCK
REGISTER
OUTPUT
REF OUT
AD7712
DIGITAL
FILTER
DRDY
www.analog.com
LC
A0
2
MOS
MCLK
IN
MCLK
OUT
SYNC
STANDBY
*

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AD7712ARZ Summary of contents

Page 1

FEATURES Charge Balancing ADC 24 Bits No Missing Codes 0.0015% Nonlinearity High Level and Low Level Analog Input Channels Programmable Gain for Both Inputs Gains from 1 to 128 Differential Input for Low Level Channel Low-Pass Filter with Programmable Filter ...

Page 2

AD7712–SPECIFICATIONS REF IN(–) = AGND; MCLK MHz unless otherwise stated. All specifications T Parameter STATIC PERFORMANCE No Missing Codes Output Noise Integral Nonlinearity @ 25° MIN MAX Positive Full-Scale Error 5 ...

Page 3

SPECIFICATIONS (continued) Parameter REFERENCE OUTPUT Output Voltage Initial Tolerance Drift Output Noise Line Regulation ( Load Regulation External Current 13 V INPUT BIAS Input Voltage Range V Rejection BIAS LOGIC INPUTS Input Current All Inputs except MCLK IN ...

Page 4

AD7712–SPECIFICATIONS Parameter POWER REQUIREMENTS Power Supply Voltages 18 AV Voltage Voltage DD AV – V Voltage DD SS Power Supply Currents AV Current DD DV Current DD V Current SS 20 Power Supply Rejection 21 Positive Supply ...

Page 5

TIMING CHARACTERISTICS Limit at T MIN Parameter (A, S Versions CLK IN 400 0.4 t CLK IN LO CLK IN t 0.4 t CLK IN HI CLK ...

Page 6

AD7712 TIMING CHARACTERISTICS Limit at T Parameter (A, S Versions) External Clocking Mode f f SCLK CLK CLK CLK IN ...

Page 7

Pin Mnemonic Function 1 SCLK Serial Clock. Logic input/output, depending on the status of the MODE pin. When MODE is high, the device is in its self-clocking mode, and the SCLK pin provides a serial clock output. This SCLK becomes ...

Page 8

AD7712 Pin Mnemonic Function DRDY Logic Output. A falling edge indicates that a new output word is available for transmission. The DRDY pin 21 will return high upon completion of transmission of a full output word. DRDY is also used ...

Page 9

Control Register (24 Bits) A write to the device with the A0 input low writes data to the control register. A read to the device with the A0 input low accesses the contents of the control register. The control register ...

Page 10

AD7712 PGA Gain Gain 128 Channel ...

Page 11

Tables I and II show the output rms noise for some typical notch and –3 dB frequencies. The numbers given are for the bipolar input ranges with 2.5 V. These numbers are REF typical and are generated ...

Page 12

AD7712 Figures 2a and 2b give information similar to that outlined in Table I. In these plots, the output rms noise is shown for the full range of available cutoffs frequencies rather than for some typical cutoff frequencies as in ...

Page 13

The AD7712 provides a number of calibration options that can be programmed via the on-chip control register. A calibration cycle can be initiated at any time by writing to this control regis- ter. The part can perform self-calibration using the ...

Page 14

AD7712 Input Sample Rate The modulator sample frequency for the device remains at f /512 (19.5 kHz @ MHz) regardless of the CLK IN CLK IN selected gain. However, gains greater than 1 are achieved by a ...

Page 15

Antialias Considerations The digital filter does not provide any rejection at integer mul- tiples of the modulator sample frequency ( This means that there are frequency bands, ± f wide (f ...

Page 16

AD7712 ANALOG INPUT FUNCTIONS Analog Input Ranges The analog inputs on the AD7712 provide the user with consid- erable flexibility in terms of analog input voltage ranges. One of the inputs is a differential, programmable gain, input channel that can ...

Page 17

V Input BIAS The V input determines at what voltage the internal analog BIAS circuitry is biased. It essentially provides the return path for analog currents flowing in the modulator, and as such it should be driven from a low ...

Page 18

AD7712 The AD7712 also provides the facility to write to the on-chip calibration registers, and, in this manner, the span and offset for the part can be adjusted by the user. The offset calibration regis- ter contains a value that ...

Page 19

Cal Type MD2, MD1, MD0 Self-Cal System Cal System Cal System Offset Cal Background Cal Span and Offset Limits Whenever a system calibration mode is ...

Page 20

AD7712 DIGITAL INTERFACE The AD7712’s serial communications port provides a flexible arrangement to allow easy interfacing to industry-standard microprocessors, microcontrollers, and digital signal processors. A serial read to the AD7712 can access data from the output register, the control register, ...

Page 21

Write Operation Data can be written to either the control register or calibration registers. In either case, the write operation is not affected by the DRDY line, and the write operation does not have any effect on the status of ...

Page 22

AD7712 Figure 13a shows a read operation from the AD7712 where RFS remains low for the duration of the data word transmis- sion. With DRDY low, the RFS input is brought low. The input SCLK signal should be low between ...

Page 23

Write Operation Data can be written to either the control register or calibration registers. In either case, the write operation is not affected by the DRDY line, and the write operation does not have any effect on the status of ...

Page 24

AD7712 SIMPLIFYING THE EXTERNAL CLOCKING MODE INTERFACE In many applications, the user may not require the facility of writing to the on-chip calibration registers. In this case, the serial interface to the AD7712 in external clocking mode can be simplified ...

Page 25

START CONFIGURE AND INITIALIZE C/ P SERIAL PORT BRING RFS, TFS AND A0 HIGH LOAD DATA FROM ADDRESS TO ACCUMULATOR REVERSE ORDER OF BITS BRING TFS AND A0 LOW WRITE DATA FROM ACCUMULATOR TO SERIAL BUFFER BRING TFS AND A0 ...

Page 26

AD7712 Table VIII. 8XC51 Code for Writing to the AD7712 MOV SCON,#00000000B; Configure 8051 for MODE 0 Operation & Enable Serial Reception MOV IE,#10010000B; Enable Transmit Interrupt MOV IP,#00010000B; Prioritize the Transmit Interrupt TFS SETB 91H; Bring RFS SETB 90H; ...

Page 27

APPLICATIONS 4–20 mA LOOP The AD7712’s high level input can be used to measure the current in 4–20 mA loop applications as shown in Figure 20. In this case, the system calibration capabilities of the AD7712 can be used to ...

Page 28

AD7712 0.005 (0.13) MIN PIN 1 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN ...

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