AD7678ASTZ Analog Devices Inc, AD7678ASTZ Datasheet

IC ADC 18BIT SAR 100KSPS 48-LQFP

AD7678ASTZ

Manufacturer Part Number
AD7678ASTZ
Description
IC ADC 18BIT SAR 100KSPS 48-LQFP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7678ASTZ

Data Interface
Serial, Parallel
Number Of Bits
18
Sampling Rate (per Second)
100k
Number Of Converters
1
Power Dissipation (max)
26mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
18bit
Sampling Rate
100kSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
4.75V To 5.25V
Number Of Elements
1
Resolution
18Bit
Architecture
SAR
Sample Rate
100KSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±4.096V
Differential Input
Yes
Power Supply Requirement
Analog and Digital
Single Supply Voltage (typ)
5V
Single Supply Voltage (min)
4.75V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
26mW
Differential Linearity Error
-1LSB/1.75LSB
Integral Nonlinearity Error
±2.5LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Input Signal Type
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7678CB - BOARD EVALUATION FOR AD7678
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7678ASTZ
Manufacturer:
ADI
Quantity:
150
Part Number:
AD7678ASTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD7678ASTZ
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20 000
Part Number:
AD7678ASTZRL
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Analog Devices Inc
Quantity:
10 000
FEATURES
18-bit resolution with no missing codes
No pipeline delay (SAR architecture)
Differential input range: ±V
Throughput: 100 kSPS
INL: ±2.5 LSB max (±9.5 ppm of full scale)
Dynamic range: 103 dB typ (V
S/(N+D): 100 dB typ @ 2 kHz (V
Parallel (18-,16-, or 8-bit bus) and serial 5 V/3 V interface
SPI
On-board reference buffer
Single 5 V supply operation
Power dissipation: 18 mW @ 100 kSPS
48-lead LQFP or 48-lead LFCSP package
Pin-to-pin compatible upgrade of AD7674/AD7676/AD7679
APPLICATIONS
CT scanners
High dynamic data acquisition
Geophone and hydrophone sensors
Instrumentation
Spectrum analysis
Medical instruments
GENERAL DESCRIPTION
The AD7678 is an 18-bit, 100 kSPS, charge redistribution SAR,
fully differential analog-to-digital converter that operates on a
single 5 V power supply. The part contains a high speed 18-bit
sampling ADC, an internal conversion clock, an internal
reference buffer, error correction circuits, and both serial and
parallel system interface ports.
The part is available in 48-lead LQFP or 48-lead LFCSP
packages with operation specified from –40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
-
 replacement (low power, multichannel)
®
/QSPI
/MICROWIRE
180 μW @ 1 kSPS
/DSP compatible
REF
REF
(V
REF
= 5 V)
REF
= 5 V)
up to 5 V)
18-Bit, 2.5 LSB INL, 100 kSPS SAR ADC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Table 1. PulSAR Selection
Type/kSPS
Pseudo-
Differential
True Bipolar
True
Differential
18-Bit
Multichannel/
Simultaneous
PRODUCT HIGHLIGHTS
1.
2.
3.
REFBUFIN
RESET
AGND
AVDD
High Resolution, Fast Throughput.
The AD7678 is a 100 kSPS, charge redistribution, 18-bit
SAR ADC (no latency).
Excellent Accuracy.
The AD7678 has a maximum integral nonlinearity of
2.5 LSB with no missing 18-bit codes.
Serial or Parallel Interface.
Versatile parallel (18-, 16-, or 8-bit bus) or 2-wire serial
interface arrangement compatible with both 3 V and
5 V logic.
IN+
IN–
PD
FUNCTIONAL BLOCK DIAGRAM
PDBUF
CALIBRATION CIRCUITRY
CONTROL LOGIC AND
100–250
AD7651
AD7660/AD7661
AD7663
AD7675
AD7678
Figure 1. Functional Block Diagram
©2003–2009 Analog Devices, Inc. All rights reserved.
SWITCHED
CAP DAC
REF REFGND
CNVST
CLOCK
AD7678
500–570
AD7650/AD7652
AD7664/AD7666
AD7665
AD7676
AD7679
AD7654
AD7655
INTERFACE
PARALLEL
SERIAL
PORT
DVDD
www.analog.com
AD7678
DGND
18
03084–0–001
800–
1000
AD7653
AD7667
AD7671
AD7677
AD7674
OVDD
OGND
D[17:0]
BUSY
RD
CS
MODE0
MODE1

Related parts for AD7678ASTZ

AD7678ASTZ Summary of contents

Page 1

FEATURES 18-bit resolution with no missing codes No pipeline delay (SAR architecture) Differential input range: ± REF REF Throughput: 100 kSPS INL: ±2.5 LSB max (±9.5 ppm of full scale) Dynamic range: 103 dB typ ...

Page 2

AD7678 TABLE OF CONTENTS Specifications ..................................................................................... 3 Timing Specifications ....................................................................... 5 Absolute Maximum Ratings ............................................................ 7 ESD Caution .................................................................................. 7 Pin Configuration and Function Descriptions ............................. 8 Definition of Specifications ........................................................... 11 Typical Performance Characteristics ........................................... 12 Circuit Information ........................................................................ ...

Page 3

SPECIFICATIONS Table 2. –40°C to +85° 4.096 V, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted. REF Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input ...

Page 4

AD7678 Parameter DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS 5 Data Format Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD Operating Current AVDD 8 DVDD 8 OVDD ...

Page 5

TIMING SPECIFICATIONS Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted. Parameter Refer to Figure 27 and Figure 28 Convert Pulse Width Time between Conversions CNVST LOW to ...

Page 6

AD7678 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time ...

Page 7

ABSOLUTE MAXIMUM RATINGS Table 5. AD7678 Absolute Maximum Ratings Parameter Analog Inputs 2 2 IN+ , IN– , REF, REFBUFIN, REFGND to AGND Ground Voltage Differences AGND, DGND, OGND Supply Voltages AVDD, DVDD, OVDD AVDD to DVDD, AVDD to OVDD ...

Page 8

AD7678 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. 48-Lead LQFP and 48-Lead LFCSP (ST-48 and CP-48) Pin Configuration Table 6. Pin Function Descriptions 1 Pin No. Mnemonic Type Description 1, 44 AGND P Analog Power Ground Pin AVDD ...

Page 9

Pin No. Mnemonic Type Description 13 D6 DI/O In all modes except MODE = 3, this output is used as Bit 6 of the parallel port data output bus. or EXT/INT When MODE = 3 (serial mode), this input, ...

Page 10

AD7678 1 Pin No. Mnemonic Type Description Power-Down Input. When set to a logic HIGH, power consumption is reduced and conversions are inhibited after the current one is completed. 35 CNVST DI Start Conversion. If CNVST is ...

Page 11

DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before ...

Page 12

AD7678 TYPICAL PERFORMANCE CHARACTERISTICS 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 0 65536 131072 CODE Figure 5. Integral Nonlinearity vs. Code 70000 60158 59966 60000 50000 40000 30000 20000 10000 5919 20015 ...

Page 13

THD –120 THIRD HARMONIC HARMONIC –130 –140 –150 FREQUENCY (kHz) Figure 11. THD and Harmonics vs. Frequency 104 V 103 102 101 100 99 98 –60 –50 –40 –30 –20 INPUT LEVEL ...

Page 14

AD7678 GAIN ERROR ZERO ERROR –10 –20 –30 –40 –50 –55 –35 – TEMPERATURE (  C) Figure 17. Zero Error and Gain Error vs. Temperature 65 85 105 125 03083-0-022 ...

Page 15

CIRCUIT INFORMATION IN+ REF REFGND IN– The AD7678 is a very fast, low power, single-supply, precise 18-bit analog-to-digital converter (ADC) using successive approximation architecture. The AD7678’s linearity and dynamic range are similar or better than many - ADCs. With the ...

Page 16

AD7678 Transfer Functions Except in 18-bit interface mode, the AD7678 offers straight binary and twos complement output coding when using OB See Figure 20 and Table 8 for the ideal transfer characteristic. 111...111 111...110 111...101 000...010 000...001 000...000 ...

Page 17

TYPICAL CONNECTION DIAGRAM Figure 21 shows a typical connection diagram for the AD7678. Different circuitry shown on this diagram is optional and is discussed later in this data sheet. Analog Inputs Figure 22 shows a simplified analog input section of ...

Page 18

AD7678 The AD8021 meets these requirements and is usually appropri- ate for almost all applications. The AD8021 needs external compensation capacitor, which should have good linearity as an NPO ceramic or mica type. The AD8022 could be ...

Page 19

POWER DISSIPATION VERSUS THROUGHPUT The AD7678 automatically reduces its power consumption at the end of each conversion phase. During the acquisition phase, the operating currents are very low, which allows for a signifi- cant power savings when the conversion rate ...

Page 20

AD7678 DIGITAL INTERFACE The AD7678 has a versatile digital interface; it can be interfaced with the host system by using either a serial or parallel interface. The serial interface is multiplexed on the parallel data bus. The AD7678 digital interface ...

Page 21

MASTER SERIAL INTERFACE Internal Clock The AD7678 is configured to generate and provide the serial data clock SCLK when the EXT/ INT pin is held low. The AD7678 also generates a SYNC signal to indicate to the host when the ...

Page 22

AD7678 EXT/INT = 0 CS, RD CNVST BUSY t 17 SYNC SCLK t X SDOUT Figure 34. Master Serial Data Timing for Reading (Read Previous Conversion during Convert) SLAVE SERIAL INTERFACE External ...

Page 23

EXT/INT = 1 CS BUSY SCLK SDOUT X D17 D16 SDIN X17 X16 t 33 Figure 35. Slave Serial Data Timing for Reading ...

Page 24

AD7678 BUSY AD7678 #2 (UPSTREAM) #1 (DOWNSTREAM) RDC/SDIN SDOUT RDC/SDIN CNVST CS SCLK SCLK CNVST IN Figure 37. Two AD7678s in a Daisy-Chain Configuration External Clock Data Read during Conversion Figure 36 shows the detailed timing diagrams ...

Page 25

APPLICATION HINTS LAYOUT The AD7678 has very good immunity to noise on the power supplies. However, care should still be taken with regard to grounding layout. The printed circuit board that houses the AD7678 should be designed so that the ...

Page 26

... INDICATOR VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range 1 AD7678ASTZ –40°C to +85°C 1 AD7678ASTZRL –40°C to +85°C 1 AD7678ACPZ –40°C to +85°C 1 AD7678ACPZRL –40°C to +85°C 2 EVAL-AD7678CBZ 1, 3 EVAL-CONTROL BRD2Z 1, 3 EVAL-CONTROL BRD3Z 1, 3 ...

Page 27

NOTES Rev Page AD7678 ...

Page 28

AD7678 NOTES ©2003–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. D03084-0-6/09(A) Rev Page ...

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