MAX1027BEEE+ Maxim Integrated Products, MAX1027BEEE+ Datasheet - Page 10

• Manufacturer Part Number: MAX1027BEEE+
• Description: IC ADC 10BIT 300KSPS 16-QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1027BEEE+

• Number Of Bits: 10
• Sampling Rate (per Second): 300k
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 667mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Number Of Adc Inputs: 8
• Architecture: Dual-Slope
• Conversion Rate: 300 KSPs
• Resolution: 10 bit
• Input Type: Differential
• Interface Type: 3-Wire (SPI, QSPI, MICROWIRE)
• Voltage Reference: Internal 2.5 V or External
• Supply Voltage (max): 3 V
• Maximum Power Dissipation: 667 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
The MAX1027/MAX1029/MAX1031 are low-power, seri-
al-output, multichannel ADCs with temperature-sensing
capability for temperature-control, process-control, and
monitoring applications. These 10-bit ADCs have inter-
nal track and hold (T/H) circuitry that supports single-
ended and fully differential inputs. Data is converted
from an internal temperature sensor or analog voltage
sources in a variety of channel and data-acquisition
configurations. Microprocessor (μP) control is made
easy through a 3-wire SPI/QSPI/MICROWIRE-compati-
ble serial interface.
Figure 2 shows a simplified functional diagram of the
MAX1027/MAX1029/MAX1031 internal architecture.
The MAX1027 has eight single-ended analog input
channels or four differential channels. The MAX1029
has 12 single-ended analog input channels or six differ-
ential channels. The MAX1031 has 16 single-ended
analog input channels or eight differential channels.
The MAX1027/MAX1029/MAX1031 ADCs use a fully dif-
ferential, successive-approximation register (SAR) con-
version technique and an on-chip T/H block to convert
temperature and voltage signals into a 10-bit digital
result. Both single-ended and differential configurations
are supported, with a unipolar signal range for single-
ended mode and bipolar or unipolar ranges for differ-
ential mode.
The ADC’s input-tracking circuitry has a 1MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. Anti-alias prefiltering
of the input signals is necessary to avoid high-frequen-
cy signals aliasing into the frequency band of interest.
Internal ESD protection diodes clamp all pins to V
and GND, allowing the inputs to swing from (GND -
0.3V) to (V
accurate conversions near full scale, the inputs must
not exceed V
GND by 50mV. If an off-channel analog input voltage
exceeds the supplies, limit the input current to 2mA.
The MAX1027/MAX1029/MAX1031 feature a serial
interface compatible with SPI/QSPI and MICROWIRE
devices. For SPI/QSPI, ensure the CPU serial interface
runs in master mode so it generates the serial clock
signal. Select the SCLK frequency of 10MHz or less,
10
______________________________________________________________________________________
DD
DD
+ 0.3V) without damage. However, for
by more than 50mV or be lower than
Detailed Description
Analog Input Protection
3-Wire Serial Interface
Converter Operation
Input Bandwidth
DD
and set clock polarity (CPOL) and phase (CPHA) in the
μP control registers to the same value. The MAX1027/
MAX1029/MAX1031 operate with SCLK idling high or
low, and thus operate with CPOL = CPHA = 0 or CPOL
= CPHA = 1. Set CS low to latch input data at DIN on
the rising edge of SCLK. Output data at DOUT is
updated on the falling edge of SCLK. Bipolar true-dif-
ferential results and temperature sensor results are
available in two’s complement format, while all others
are in binary.
Serial communication always begins with an 8-bit input
data byte (MSB first) loaded from DIN. Send a second
byte, immediately following the setup byte, to write to
the unipolar mode or bipolar mode registers (see
Tables 1, 3, 4, and 5). A high-to-low transition on CS ini-
tiates the data input operation. The input data byte and
the subsequent data bytes are clocked from DIN into
the serial interface on the rising edge of SCLK.
Tables 1–7 detail the register descriptions. Bits 5 and 4,
CKSEL1 and CKSEL0, respectively, control the clock
modes in the setup register (see Table 3). Choose
between four different clock modes for various ways to
start a conversion and determine whether the acquisi-
tions are internally or externally timed. Select clock
mode 00 to configure CNVST/AIN_ to act as a conver-
sion start and use it to request the programmed inter-
nally timed conversions without tying up the serial bus.
In clock mode 01, use CNVST to request conversions
one channel at a time, controlling the sampling speed
without tying up the serial bus. Request and start inter-
nally timed conversions through the serial interface by
writing to the conversion register in the default clock
mode, 10. Use clock mode 11 with SCLK up to 4.8MHz
for externally timed acquisitions to achieve sampling
rates up to 300ksps. Clock mode 11 disables scanning
and averaging. See Figures 4–7 for timing specifica-
tions and how to begin a conversion.
These devices feature an active-low, end-of-conversion
output. EOC goes low when the ADC completes the
last-requested operation and is waiting for the next input
data byte (for clock modes 00 and 10). For clock mode
01, EOC goes low after the ADC completes each
requested operation. EOC goes high when CS or
CNVST goes low. EOC is always high in clock mode 11.
The MAX1027/MAX1029/MAX1031 use a fully differen-
tial ADC for all conversions. The analog inputs can be
configured for either differential or single-ended con-
versions by writing to the setup register (see Table 3).
Single-ended conversions are internally referenced to
GND (Figure 3).
Single-Ended/Differential Input