MAX19516ETM+ Maxim Integrated Products, MAX19516ETM+ Datasheet - Page 6

• Manufacturer Part Number: MAX19516ETM+
• Description: IC ADC 10BIT 100MSPS DUAL 48TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX19516ETM+

• Number Of Bits: 10
• Sampling Rate (per Second): 100M
• Data Interface: Serial, Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Conversion Rate: 100 MSPs
• Resolution: 10 bit
• Interface Type: SPI
• Snr: 60.1 dB
• Voltage Reference: 1.25 V
• Supply Voltage (max): 3.5 V
• Supply Voltage (min): 1.7 V
• Maximum Power Dissipation: 3200 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 1.8 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual-Channel, 10-Bit, 100Msps ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
tion = 50Ω, T
6
POWER-MANAGEMENT CHARACTERISTICS
Wake-Up Time from Shutdown
Wake-Up Time from Standby
SERIAL-PORT INTERFACE TIMING (Note 2) (Figure 7)
SCLK Period
SCLK to CS Setup Time
SCLK to CS Hold Time
SDIN to SCLK Setup Time
SDIN to SCLK Hold Time
SCLK to SDIN Output Data Delay
TIMING CHARACTERISTICS—DUAL BUS PARALLEL MODE (Figure 9) (Default Timing, see Table 5)
Clock Pulse-Width High
Clock Pulse-Width Low
Clock Duty Cycle
Data Delay After Rising Edge of
CLK+
Data to DCLK Setup Time
Data to DCLK Hold Time
TIMING CHARACTERISTICS—MULTIPLEXED BUS PARALLEL MODE (Figure 10) (Default Timing, see Table 5)
Clock Pulse-Width High
Clock Pulse-Width Low
Clock Duty Cycle
Data Delay After Rising Edge of
CLK+
Data to DCLK Setup Time
Data to DCLK Hold Time
DCLK Duty Cycle
MUX Data Duty Cycle
TIMING CHARACTERISTICS—SYNCHRONIZATION (Figure 12)
Setup Time for Valid Clock Edge
Hold-Off Time for Invalid Clock
Edge
Minimum Synchronization Pulse
Width
AVDD
_______________________________________________________________________________________
= V
PARAMETER
OVDD
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
= 1.8V, internal reference, differential clock, V
t
t
SYMBOL
t
t
DCH
CHA
CH
CH
t
t
t
t
t
t
t
SETUP
SETUP
WAKE
WAKE
HOLD
HOLD
t
t
t
SCLK
t
t
t
t
CSH
SDH
SDD
t
t
t
t
CSS
SDS
t
t
SUV
CH
DD
CH
DD
HO
CL
CL
/t
/t
/t
/t
CLK
CLK
CLK
CLK
Internal reference, C
Internal reference
Serial-data write
Serial-data write
Serial-data read
C
C
C
C
C
C
C
C
C
C
Edge mode (Note 2)
Edge mode (Note 2)
Relative to input clock period
L
L
L
L
L
L
L
L
L
L
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
= 10pF, V
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
CLK
CONDITIONS
= 1.5V
= 1.8V (Note 2)
= 3.3V
= 1.8V (Note 2)
= 1.8V (Note 2)
= 1.8V (Note 2)
= 3.3V
= 1.8V (Note 2)
= 1.8V (Note 2)
= 1.8V (Note 2)
= 1.8V (Note 2)
REFIO
P-P
= 0.1µF (10τ)
, f
CLK
A
= +25°C.) (Note 1)
= 100MHz, A
MIN
IN
2.1
8.1
0.6
2.1
2.9
0.4
0.7
0.5
50
10
10
10
41
41
0
= -0.5dBFS, data output termina-
30 to 70
30 to 70
TYP
5.0
5.0
4.0
3.1
8.7
1.3
5.0
5.0
3.9
3.1
3.9
1.1
15
50
50
5
2
MAX
5.8
5.8
10
59
59
Cycles
UNITS
ms
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
%