LTC2431CMS Linear Technology, LTC2431CMS Datasheet - Page 13

• Manufacturer Part Number: LTC2431CMS
• Description: IC ADC 20BIT DIFFINPUT/REF10MSOP
• Manufacturer: Linear Technology

Specifications of LTC2431CMS

• Number Of Bits: 20
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
above +FS. If both Bit 21 and Bit 20 are LOW, the
differential input voltage is below –FS.
The function of these bits is summarized in Table 1.
Table 1. LTC2430/LTC2431 Status Bits
Input Range
V
0V V
–0.5 • V
V
Bits 20-0 are the 21-bit conversion result MSB first.
Bit 0 is the least significant bit (LSB).
Data is shifted out of the SDO pin under control of the serial
clock (SCK), see Figure 3. Whenever CS is HIGH, SDO
remains high impedance and any externally generated
SCK clock pulses are ignored by the internal data out shift
register.
IN
IN
< – 0.5 • V
0.5 • V
IN
REF
< 0.5 • V
Table 2. LTC2430/LTC2431 Output Data Format
Differential Input Voltage
V
V
0.5 • V
0.25 • V
0.25 • V
0
–1LSB
– 0.25 • V
– 0.25 • V
– 0.5 • V
V
*The differential input voltage V
**The differential reference voltage V
IN
IN
IN
REF
* 0.5 • V
* < –0.5 • V
*
V
REF
IN
REF
REF
< 0V
REF
REF
REF
REF
REF
** – 1LSB
**
** – 1LSB
**
**
** – 1LSB
REF
REF
U
**
**
SDO
SCK
U
CS
SLEEP
Hi-Z
IN
Bit 23 Bit 22 Bit 21 Bit 20
EOC
= IN
0
0
0
0
W
Bit 23
EOC
REF
0
0
0
0
0
0
0
0
0
0
+
BIT 23
EOC
– IN
= REF
DMY
1
0
0
0
0
–
.
+
Bit 22
BIT 22
DMY
– REF
“0”
0
0
0
0
0
0
0
0
0
0
Figure 3. Output Data Timing
U
SIG
1
1
0
0
2
–
.
Bit 21
MSB
SIG
BIT 21
SIG
1
1
1
1
1
0
0
0
0
0
1
0
1
0
DATA OUTPUT
3
Bit 20
BIT 20
MSB
MSB
In order to shift the conversion result out of the device, CS
must first be driven LOW. EOC is seen at the SDO pin of the
device once CS is pulled LOW. EOC changes real time from
HIGH to LOW at the completion of a conversion. This
signal may be used as an interrupt for an external micro-
controller. Bit 23 (EOC) can be captured on the first rising
edge of SCK. Bit 22 is shifted out of the device on the first
falling edge of SCK. The final data bit (Bit 0) is shifted out
on the falling edge of the 23rd SCK and may be latched on
the rising edge of the 24th SCK pulse. On the falling edge
of the 24th SCK pulse, SDO goes HIGH indicating the
initiation of a new conversion cycle. This bit serves as EOC
(Bit 22) for the next conversion cycle. Table 2 summarizes
the output data format.
As long as the voltage on the IN
within the – 0.3V to (V
operating range, a conversion result is generated for any
differential input voltage V
+FS = 0.5 • V
1
0
0
0
0
1
1
1
1
0
4
BIT 19
Bit 19
0
1
1
0
0
1
1
0
0
1
5
REF
BIT 0
LSB
. For differential input voltages greater than
Bit 18
24
0
1
0
1
0
1
0
1
0
1
LTC2430/LTC2431
CONVERSION
Bit 17
CC
0
1
0
1
0
1
0
1
0
1
IN
2431 F03
+ 0.3V) absolute maximum
from –FS = – 0.5 • V
+
and IN
…
…
…
…
…
…
…
…
…
…
…
–
pins is maintained
Bit 0
LSB
0
1
0
1
0
1
0
1
0
1
13
REF
24301f
to