LTC1594IS Linear Technology, LTC1594IS Datasheet - Page 11

• Manufacturer Part Number: LTC1594IS
• Description: IC A/D CONV 12BIT SRL 4CH 16SOIC
• Manufacturer: Linear Technology

Specifications of LTC1594IS

• Number Of Bits: 12
• Sampling Rate (per Second): 16.8M
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1.6mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIONS
Data Transfer
The CLK synchronizes the data transfer with each bit
being transmitted on the falling CLK edge and captured
on the rising CLK edge in both transmitting and receiving
systems.
The LTC1594/LTC1598 first receive input data and then
transmit back the A/D conversion results (half duplex).
Because of the half duplex operation, D
be tied together allowing transmission over just 3 wires:
CS, CLK and DATA (D
Data transfer is initiated by a rising chip select (CS)
signal. After CS rises the input data on the D
latched into a 4-bit register on the rising edge of the clock.
More than four input bits can be sent to the D
without problems, but only the last four bits clocked in
before CS falls will be stored into the 4-bit register. This
4-bit input data word will select the channel in the
multiplexer (see Input Data Word and Tables 1 and 2). To
ensure correct operation the CS must be pulled low
before the next rising edge of the clock.
Once the CS is pulled low, all channels are simulta-
neously switched off after a delay of t
CSMUX = CSADC = CS
COM = GND
MUXOUT
ADCIN =
CH0 TO
D
CH7
CLK
OUT
D
U
IN
IN
/D
INFORMATION
U
Figure 2. LTC1594/LTC1598 Operating Sequence Example: All Channels Off
OUT
EN
).
D2
Hi-Z
W
D1
D0
IN
OFF
and D
t
to ensure a
OFF
t
suCS
U
OUT
IN
NULL
BIT
IN
pin is
may
pin
break-before-make interval, t
(t
allowing the ADC in the chip to acquire input signal and
start the conversion (see Figures 1 and 2). After 1 null bit,
the result of the conversion is output on the D
The selected channel remains on, until the next falling
edge of CS. At the end of the data exchange CS should be
brought high. This resets the LTC1594/LTC1598 and
initiates the next data exchange.
Break-Before-Make
The LTC1594/LTC1598 provide a break-before-make
interval from switching off all the channels simulta-
neously to switching on the next selected channel once
CS is pulled low. In other words, once CS is pulled low,
t
CYC
ADDRESS IN
OFF
SHIFT MUX
D0N‘T CARE
DUMMY CONVERSION
+ t
t
CS
CONV
OPEN
D
t
SMPL
IN1
), the selected channel is switched on,
+ 1 NULL BIT
D
OUT1
LTC1594/LTC1598
OPEN
SHIFT A/D CONVERSION
RESULT OUT
. After a delay of t
D
IN2
Hi-Z
1594/98 F02
D
OUT2
OUT
11
1594/98 AI01
15948fb
line.
ON