AD7788ARMZ Analog Devices Inc, AD7788ARMZ Datasheet - Page 12

• Manufacturer Part Number: AD7788ARMZ
• Description: IC ADC 16BIT SIGMA-DELTA 10MSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7788ARMZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 16
• Sampling Rate (per Second): 16.6
• Number Of Converters: 1
• Power Dissipation (max): 230µW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP (0.118", 3.00mm Width)
• Resolution (bits): 16bit
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 2.7V To 5.25V
• Supply Current: 80µA
• Digital Ic Case Style: SOP
• No. Of Pins: 10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7788/AD7789
Table 8. Register Selection
RS1
0
0
0
1
1
Table 9. Channel Selection
CH1
0
0
1
1
STATUS REGISTER
(RS1, RS0 = 0, 0; Power-On/Reset = 0x88 for AD7788 and 0x8C for AD7789)
The status register is an 8-bit, read only register. To access the ADC status register, the user must write to the communications register,
select the next operation to be a read, and load Bit RS1 and Bit RS0 with 0. Table 10 outlines the bit designations for the status register.
SR0 through SR7 indicate the bit locations, SR denoting the bits are in the status register. SR7 denotes the first bit of the data stream. The
number(s) in brackets indicates the power-on/reset default status of that bit.
MSB
SR7
RDY[1]
Table 10. Status Register Bit Designations
Bit Location
SR7
SR6
SR5
SR4
SR3
SR2
SR1 to SR0
Bit Name
RDY
ERR
0
0
1
WL
CH1 to CH0
SR6
ERR[0]
RS0
0
0
1
0
1
CH0
0
1
0
1
Description
Ready Bit for ADC. Cleared when data is written to the ADC data register. The RDY bit is set automatically
after the ADC data register has been read or a period of time before the data register is updated with a
new conversion result to tell the user not to read the conversion data. It is also set when the part is
placed in power-down mode. The end of a conversion is indicated by the DOUT/RDY pin. This pin can be
used as an alternative to the status register for monitoring the ADC for conversion data.
ADC Error Bit. This bit is written to at the same time as the RDY bit. Set to indicate that the result written
to the ADC data register has been clamped to all 0s or all 1s. Error sources include overrange, under-
range. Cleared by a write operation to start a conversion.
This bit is cleared automatically.
This bit is cleared automatically.
This bit is set automatically.
AD7788/AD7789 Identifier. This bit is cleared automatically if the device is an AD7788 and it is set
automatically if the device is an AD7789. This bit is used to distinguish between the AD7788 and
AD7789.
These bits indicate which channel is being converted by the ADC.
SR5
0[0]
Register
Communications register during a write operation
Status register during a read operation
Mode register
Reserved
Data register
SR4
0[0]
Rev. B | Page 12 of 20
AIN(+) − AIN(−)
Reserved
AIN(−) − AIN(−)
V
Channel
DD
monitor
SR3
1[1]
SR2
WL[1/0]
SR1
CH1[0]
Register Size
8-bit
8-bit
8-bit
8-bit
16-bit (AD7788)
24-bit (AD7789)
SR0
CH0[0]
LSB