CS5524-ASZR Cirrus Logic Inc, CS5524-ASZR Datasheet
CS5524-ASZR
Specifications of CS5524-ASZR
Related parts for CS5524-ASZR
CS5524-ASZR Summary of contents
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... Charge Pump Drive for Negative Supply - + Digital Supply Operation Low Power Consumption: 6.0 mW AIN1+ AIN1- + AIN2+ AIN2- MUX AIN3+ CS5524 Shown AIN3- AIN4+ AIN4- NBV CPD http://www.cirrus.com General Description The CS5521/22/23/24/28 are highly integrated ΔΣ ana- log-to-digital converters (ADCs) which use charge- balance techniques to achieve 16-bit (CS5521/23) and 24-bit (CS5522/24/28) performance ...
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TABLE OF CONTENTS ANALOG CHARACTERISTICS ................................................................................................ 5 TYPICAL RMS NOISE, CS5521/23.......................................................................................... 7 TYPICAL NOISE FREE RESOLUTION (BITS), CS5521/23 .................................................... 7 TYPICAL RMS NOISE, CS5522/24/28..................................................................................... 8 TYPICAL NOISE FREE RESOLUTION (BITS), CS5522/24/28 ............................................... DIGITAL CHARACTERISTICS........................................................................................... ...
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Example of Using the CSRs to Perform Conversions and Calibrations .............. 38 1.5 Conversion Output Coding .............................................................................................. 40 1.5.1 Conversion Data FIFO Descriptions ................................................................... 41 1.6 Digital Filter ..................................................................................................................... 42 1.7 Clock Generator .............................................................................................................. 42 1.8 Power Supply Arrangements ...
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LIST OF FIGURES Figure 1. Continuous Running SCLK Timing (Not to Scale) ......................................................... 12 Figure 2. SDI Write Timing (Not to Scale) ..................................................................................... 12 Figure 3. SDO Read Timing (Not to Scale) ................................................................................... 12 Figure 4. Multiplexer Configurations.............................................................................................. 13 Figure ...
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CHARACTERISTICS AND SPECIFICATIONS ANALOG CHARACTERISTICS NBV = -2.1 V, XIN = 32.768 kHz, CFS1-CFS0 = ‘00’, OWR (Output Word Rate Sps, Bipolar Mode, Input Range = ±100 mV; See Notes 1 and 2.) Parameter Accuracy Resolution Linearity Error ...
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ANALOG CHARACTERISTICS Parameter Analog Input Common Mode + Signal on AIN+ or AIN- NBV = -1.8 to -2.5 V Range = 25 mV, 55 mV, or 100 mV Range = NBV = AGND ...
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TYPICAL RMS NOISE, CS5521/23 Output Rate -3 dB Filter (Sps) Frequency 1.88 1.64 3.76 3.27 7.51 6.55 15.0 12.7 30.0 25.4 61.6 (Note 12) 50.4 84.5 (Note 12) 70.7 101.1 (Note 12) 84.6 Notes: 10. Wideband noise aliased into the ...
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TYPICAL RMS NOISE, CS5522/24/28 Output Rate -3 dB Filter (Sps) Frequency 1.88 1.64 3.76 3.27 7.51 6.55 15.0 12.7 30.0 25.4 61.6 (Note 16) 50.4 84.5 (Note 16) 70.7 101.1 (Note 16) 84.6 Notes: 14. Wideband noise aliased into the ...
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V DIGITAL CHARACTERISTICS See Notes 2 and 18.)) Parameter High-level Input Voltage All Pins Except XIN and SCLK Low-level Input Voltage All Pins Except XIN and SCLK High-level Output Voltage All Pins Except CPD and SDO (Note 19) Low-level ...
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DYNAMIC CHARACTERISTICS Parameter Modulator Sampling Frequency Filter Settling Time to 1/2 LSB (Full-scale Step) RECOMMENDED OPERATING CONDITIONS Parameter DC Power Supplies Analog Reference Voltage Negative Bias Voltage Notes: 20. All voltages with respect to ground. ABSOLUTE MAXIMUM RATINGS Parameter DC ...
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SWITCHING CHARACTERISTICS Levels: Logic Logic 1 = VD+; C Parameter Master Clock Frequency External Clock or Internal Oscillator (CS5522/24/28) Master Clock Duty Cycle Rise Times Any Digital Input Except SCLK Fall Times Any Digital Input Except ...
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Figure 1. Continuous Running SCLK Timing (Not to Scale ...
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... Sps when a 200 kHz clock is used (CS5522/24/28 401 Sps using a 130 kHz clock (CS5521/23). Further note that the digital fil- CS5522 AIN2+ AIN2- M AIN1+ U AIN1- X CS5524 AIN4+ AIN4 AIN1+ AIN1- CS5528 AIN8+ ...
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Instrumentation Amplifier The instrumentation amplifier is chopper stabilized and is activated any time conversions are performed with the low-level input ranges, ≤100 mV. The am- plifier is powered from VA+ and from the NBV (Negative Bias Voltage) pin CS5521/22/23/24/28 ...
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Analog Input Span Considerations The CS5521/22/23/24/28 is designed to measure full-scale ranges of 25 mV, 55 mV, 100 mV 2.5 V, and 5 V. Other full scale values can be ac- commodated by performing a system calibration ...
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This is low enough to permit large external resistors to divide down a large external signal without significant loading. Figure 7 illustrates an example ...
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A group of registers, called Channel Set-up Regis- ters, are also included in the converters. These reg- isters are used to hold pre-loaded conversion instructions. Each channel set-up ...
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System Initialization After power is first CS5521/22/2324/28 devices, the user should wait for the oscillator to start before attempting to com- municate with the converter 32.768 kHz crys- tal is used, this may be 500 milliseconds. The ...
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Command Register Quick Reference D7(MSB CS2 CS1 BIT NAME D7 Command Bit, CB D6-D4 Channel Select Bits, CSB2-CSB0 D3 Read/Write, R/W D2-D0 Register Select Bit, RSB2-RSB0 D7(MSB CSRP3 CSRP2 CSRP1 BIT NAME D7 ...
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Command Register Descriptions READ/WRITE INDIVIDUAL OFFSET CALIBRATION REGISTER D7(MSB CS2 : Function These commands are used to access each offset register separately. CS1 - CS0 decode the registers accessed. R/W (Read/Write) 0 Write to selected register. 1 ...
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READ/WRITE CONFIGURATION REGISTER D7(MSB Function: These commands are used to read from or write to the configuration register. R/W (Read/Write) 0 Write to selected register. 1 Read from selected register. READ/WRITE CHANNEL-SETUP REGISTER(S) D7(MSB ...
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PERFORM CONVERSION D7(MSB CSRP3 CSRP2 Function: These commands instruct the ADC to perform conversions on the physical input channel point the pointer bits (CSRP2 - CSRP0) in the channel-setup registers. The particular type of conversion ...
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PERFORM CALIBRATION D7(MSB CSRP3 CSRP2 Function: These commands instruct the ADC to perform a calibration on the physical input channel refer- enced which is chosen by the command byte pointer bits (CSRP3 - CRSP0). CSRP [3:0] (Channel Setup ...
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SYNC1 D7(MSB Function: Part of the serial port re-initialization sequence. SYNC0 D7(MSB Function: End of the serial port re-initialization sequence. NULL D7(MSB Function: This command is used to clear a port ...
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Serial Port Interface The CS5521/22/23/24/28’s serial interface consists of four control lines: CS, SCLK, SDI, SDO. Figure 10 illustrates the serial sequence necessary to write to, or read from the serial port’s registers. CS (Chip Select) is the control ...
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Reading/Writing the Offset, Gain, and Configuration Registers The CS5521/22/23/24/28’s offset, gain, and config- uration registers are accessed individually and can be read from or written to. To write to an offset, a gain, or the configuration register, the user ...
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CSR (Channel-Setup Register) #1 Setup 1 Setup 2 Bits <47:36> Bits <35:24> #2 Setup 3 Setup 4 Bits <23:12> Bits <11:0> CS5521/22 D23(MSB) D22 D21 D20 A1 A0 CS2 CS1 D11 D10 CS2 CS1 BIT NAME ...
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Latch Outputs The A1-A0 pins mimic the latch output, D23/D11- D22/D10, bits of the channel-setup registers. A1-A0 can be used to control external multiplexers and oth- er logic functions outside the converter. The outputs can sink or source at ...
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The CS5521/23 typically consume 6.0 mW. The low-power mode is an alternate mode in the CS5522/24/28 that reduces the consumed power to 5.5 mW entered by setting bit D8 (the low-power mode bit) in the ...
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... Setups are converted when MC=1 and a command byte 1111 with its MSB = 1 is issued. Note that the CS5522 has two CSRS, the CS5524 has four CSRs, and the CS5528 has 8 CSRs Standby Mode (Oscillator active, allows quick power-up). ...
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Calibration The CS5521/22/23/24/28 offer four different cali- bration functions including self calibration and sys- tem calibration. However, after the devices are reset, the converter is functional and can perform measurements without being calibrated. In this case, the converter will ...
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AIN- pin must be at the proper com- mon-mode voltage as specified in ‘Common Mode +Signal AIN+/-’ specification in the Analog Input section (if AIN- = ...
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In either case, the calibration signals must be within the specified calibration limits for each specific calibration step (refer to the ‘System Calibration Specifications’ in ANALOG CHARACTERISTICS system gain calibration is performed the ...
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The variables are defined below First calibration voltage V1 = Second calibration voltage (greater than V0 Result of any uncalibrated conversion Ru0 = Result of uncalibrated conversion V0 (24-bit integer or 2’s complement) Ru1 = Result ...
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Further note that the type of conversion(s) performed and the way to access the resulting data from the FIFO is determined by the MC (multiple conversion), the LP (loop), the RC (read convert), and the DP (depth ...
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SDO line. If, during the first 8 SCLKs, "00000000" is provided on SDI, the converter will remain in this conversion mode, and continue to perform conversions on the selected Setup. To exit this conversion mode, "11111111" must be provid- ed ...
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Repeated Multiple-Setup Conversions without Wait ( this conversion mode, the ADC will repeatedly perform conversions, referencing multiple Setups. The CSRP bits in the command word are ignored in this mode. ...
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SCLKs for each Setup referenced are required to read the conversion words from the data FIFO. The first 8 SCLKs are used to clear the SDO flag. Ev- ery 24 bits thereafter consist of the data words of each Setup ...
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SD0. After ‘1111 1111’ is provided, 24 additional SCLKs are required to transfer the last 3 bytes of conversion data before the serial port will return to the command mode. Example 3: The configuration register has the following bits as ...
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Once the CSRs are programmed, repeated conver- sions Setups can be performed by is- suing only one command byte. 5) The single conversion mode also requires only one command, but whenever ...
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Conversion Data FIFO Descriptions CS5521/23 (EACH 16-BIT CONVERSIONS) D23 D22 D21 D20 D19 MSB D11 D10 LSB CS5522/24/28 (EACH 24-BIT CONVERSION LEVELS) D23 D22 D21 D20 D19 MSB 22 ...
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Digital Filter The CS5521/22/23/24/28 have eight different lin- ear phase digital filters which set the output word rates (OWRs) shown in Table 3. These rates as- sume that XIN is 32.768 kHz. Each of the filters has a magnitude ...
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Power Supply Arrangements The CS5521/22/23/24/28 A/D converters are de- signed to operate from a single +5 V analog supply and a single + digital supply. A -2.1 V supply is usually generated from the charge ...
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Figure 22. CS5522 Configured for ground-referenced Unipolar Signals + alo ...
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Charge Pump Drive Circuits The CPD (Charge Pump Drive) pin of the converter can be used with external components (shown in Figure 21) to develop an appropriate negative bias voltage for the NBV pin. When CPD is used to ...
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The converter input ranges are specified with a voltage reference of 2.5 V. The device can be op- erated ...
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Once calibration is ready, input the command to start conversions in DS317F8 CS5521/22/23/24/28 the mode you have selected via the configuration register bits. Monitor the SDO ...
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PCB Layout The CS5521/22/23/24/28 should be placed entirely over an analog ground plane with both the AGND and DGND pins of the device connected to the an- alog plane. Place the analog-digital plane split im- mediately adjacent to the ...
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... Single-ended Analog Input AIN5+ Single-ended Analog Input AIN6+ Negative Bias Voltage Logic Output Charge Pump Drive Serial Data Input Chip Select Crystal In DS317F8 1 VA CS5521 CS5522 4 NBV CPD 7 SDI XIN CS5523 CS5524 NBV CPD 9 SDI XIN CS5528 NBV CPD 9 SDI XIN ...
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... Measurement and Reference Inputs AIN1+, AIN1-, AIN2+, AIN2- AIN3+, AIN3-, AIN4+, AIN4- - Differential Analog Input. Differential input pins into the CS5522 and CS5524 devices. AIN1+, AIN2+, AIN3+, AIN4+, AIN5+, AIN6+, AIN7+, AIN8+ - Single-Ended Analog Input. Single-ended input pins into the CS5528. ...
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NBV - Negative Bias Voltage. Input pin to supply the negative supply voltage for the 20X gain instrumentation amplifier and coarse/fine charge buffers. May be tied to AGND if AIN+ and AIN- inputs are centered around +2 ...
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SPECIFICATION DEFINITIONS Linearity Error The deviation of a code from a straight line which connects the two endpoints of the A/D Converter transfer function. One endpoint is located 1/2 LSB below the first code transition and the other endpoint ...
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... ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number Package CS5521-ASZ 20-pin 0.2" Plastic SSOP (Lead Free) CS5522-ASZ CS5523-ASZ CS5524-ASZ 24-pin 0.2" Plastic SSOP (Lead Free) CS5528-ASZ * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS317F8 Package ±0.003% 20-pin 0.2" Plastic SSOP (Lead Free) ± ...
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PACKAGE DIMENSION DRAWINGS 20L SSOP PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.002 A2 0.064 b 0.009 D 0.272 E 0.291 E1 0.197 e 0.022 L 0.025 ∝ 0° Notes: 1. ...
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SSOP PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.002 A2 0.064 b 0.009 D 0.311 E 0.291 E1 0.197 e 0.022 L 0.025 ∝ 0° Notes: 1. “D” and “E1” are ...
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REVISION HISTORY Revision Date F8 JUL 2009 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to IMPORTANT NOTICE Cirrus Logic, Inc. and its ...