AD7738BRU Analog Devices Inc, AD7738BRU Datasheet - Page 17

no-image

AD7738BRU

Manufacturer Part Number
AD7738BRU
Description
IC ADC 24BIT 8-CH 28-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7738BRU

Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
15.4k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
100mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP (0.173", 4.40mm Width)
For Use With
EVAL-AD7738EBZ - BOARD EVAL FOR AD7738

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7738BRU
Quantity:
10
Part Number:
AD7738BRUZ
Manufacturer:
ADI
Quantity:
1 000
Part Number:
AD7738BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7738BRUZ-REEL7
Manufacturer:
ADI
Quantity:
1 000
Channel Setup Registers
8 Bits, Read/Write Register, Address 28h–2Fh, Default Value 00h
These registers are used to configure the selected channel, its input voltage range, and set up the corresponding Channel Status
register.
Bit
Mnemonic
Default
Bit
7
6, 5
4
3
2–0
Channel
0
1
2
3
4
5
6
7
Channel Conversion Time Registers
8 Bits, Read/Write Register, Address 30h–37h, Default Value 91h
The Conversion Time registers enable or disable chopping and configure the digital filter for a particular channel.
This register value affects the conversion time, frequency response, and noise performance of the ADC.
Bit
Mnemonic
Default
Bit
7
6–0
REV. 0
Mnemonic
CHOP
FW
Mnemonic
BUF OFF
COM1, COM0 Analog Input Configuration. See Table XI.
Stat. Opt.
ENABLE
RNG2–0
COM1
0
AIN0–AINCOM
AIN1–AINCOM
AIN2–AINCOM
AIN3–AINCOM
AIN4–AINCOM
AIN5–AINCOM
AIN6–AINCOM
AIN7–AINCOM
Bit 7
BUF OFF
0
Description
Buffer Off. If reset to 0, then internal buffer is enabled. Only operation with internal buffer enabled
is recommended.
Status Option. When this bit is set to 1, the P1 bit in the Status Channel register will reflect the state
of the P1 pin. When this bit is reset to 0, the P1 bit in the Status Channel register bit will reflect
the channel corresponding RDY bit in the ADC Status register.
Channel Enable. Set this bit to 1 to enable the channel in the Continuous Conversion mode. A single
conversion will take place regardless of this bit value.
The Channel Input Voltage Range. See Table XII.
Bit 7
CHOP
1
Description
Chop Enable Bit. Set to 1 to apply chopping mode for a particular channel.
CHOP = 1, Single Conversion or Continuous Conversion with one channel enabled.
Conversion Time (µs) = (FW
CHOP = 1, Continuous Conversion with two or more channels enabled.
Conversion Time (µs) = (FW
CHOP = 0, Single Conversion or Continuous Conversion with one channel enabled.
Conversion Time (µs) = (FW
CHOP = 0, Single Conversion or Continuous Conversion with two or more channels enabled.
Conversion Time (µs) = (FW
Table XI.
COM0
0
Bit 6
COM1
0
Bit 6
COM1
1
AIN0–AIN1
AIN2–AIN3
AIN4–AIN5
AIN6–AIN7
AIN0–AIN1
AIN2–AIN3
AIN4–AIN5
AIN6–AIN7
Bit 5
COM0
0
COM0
1
Bit 5
128 + 248)/MCLK Frequency (MHz), the FW in range of 2 to 127.
128 + 249)/MCLK Frequency (MHz), the FW in range of 2 to 127.
64 + 206)/MCLK Frequency (MHz), the FW in range of 3 to 127.
64 + 207)/MCLK Frequency (MHz), the FW in range of 3 to 127.
–17–
Bit 4
Stat. Opt.
0
Bit 4
RNG2
1
1
0
0
0
0
FW (7-Bit Filter Word)
RNG1
0
0
0
0
1
1
Bit 3
ENABLE
0
Bit 3
11h
Table XII.
RNG0
0
1
0
1
0
1
Bit 2
RNG2
0
Bit 2
Nominal Input
Voltage Range
± 2.5 V
0 V to +2.5 V
± 1.25 V
0 V to +1.25 V
± 0.625 V
0 V to +0.625 V
Bit 1
RNG1
0
Bit 1
AD7738
Bit 0
RNG0
0
Bit 0

Related parts for AD7738BRU