AD7734BRUZ Analog Devices Inc, AD7734BRUZ Datasheet
AD7734BRUZ
Specifications of AD7734BRUZ
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AD7734BRUZ Summary of contents
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FEATURES High resolution ADC 24 bits no missing codes ±0.0025% nonlinearity Optimized for fast channel switching 18-bit p-p resolution (21 bits effective) at 500 Hz 16-bit p-p resolution (19 bits effective kHz 14-bit p-p resolution (18 bits effective) ...
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AD7734 TABLE OF CONTENTS AD7734—Specifications.................................................................. 3 Timing Specifications....................................................................... 6 Absolute Maximum Ratings............................................................ 8 Typical Performance Characteristics ............................................. 9 Output Noise and Resolution Specification................................ 10 Chopping Enabled...................................................................... 10 Chopping Disabled..................................................................... 11 Pin Configurations and Functional Descriptions ...................... 12 Register Description....................................................................... 14 ...
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AD7734—SPECIFICATIONS Table 1. (–40°C to +105° ± 5 BIASLO, REFIN(–) = AGND; AIN Range = ± Parameter ADC PERFORMANCE CHOPPING ENABLED Conversion Time Rate Missing Codes Output Noise Resolution ...
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AD7734 Parameter 1, 8 BIAS0 to 3, BIASHI Pin Impedance Input Resistor Matching Input Resistor Temp. Coefficient REFERENCE INPUTS 1, 9 REFIN(+) to REFIN(–) Voltage NOREF Trigger Voltage REFIN(+), REFIN(–) 1 Common-Mode Voltage 10 Reference Input DC Current 1, 11 ...
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Parameter 13 Power Dissipation (Normal Mode +DV Current (Standby Mode Power Dissipation (Standby Mode) 1 Specifications are not production tested but guaranteed by design and/or characterization data at initial product release. 2 See Typi cal ...
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AD7734 TIMING SPECIFICATIONS Table 2. ( ± ± 5%; Input Logic Logic unless otherwise noted.) Parameter ...
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SCLK DOUT MSB Figure 2. Read Cycle Timing Diagram SCLK DIN MSB Figure 3. Write Cycle Timing Diagram ...
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AD7734 ABSOLUTE MAXIMUM RATINGS Table 25°C, unless otherwise noted. A Parameter AV to AGND DGND DD DD AGND to DGND AIN to AGND BIAS to AGND REFIN+, REFIN– to AGND ...
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TYPICAL PERFORMANCE CHARACTERISTICS 25 24 CHOP = FILTER WORD Figure 5. No Missing Codes Performance, Chopping Enabled 25 24 CHOP = ...
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AD7734 OUTPUT NOISE AND RESOLUTION SPECIFICATION The AD7734 can be operated with chopping enabled or disabled, allowing the ADC to be programmed to either optimize the throughput rate and channel switching time or to optimize the offset drift performance. Noise ...
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Chopping Disabled The second mode, in which the AD7734 is configured with chopping disabled (CHOP = 0), provides faster conversion time while still maintaining high resolution. Table 7 to Table 9 show the –3 dB frequencies and typical performance versus ...
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AD7734 PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS SCLK MCLKIN 3 MCLKOUT RESET AD7734 TOP VIEW (Not to Scale) 8 SYNC/P1 21 INTBIAS 9 20 ...
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Pin No. Mnemonic 9 INTBIAS 10 MUX0 11, 14, 15, 18 BIAS0–BIAS3 12, 13, 16, 17 AIN0–AIN3 19 BIASLO 20 BIASHI 21 REFIN(+) 22 REFIN(–) 23 AGND 24 RDY 25 DOUT 26 DIN DGND Description This ...
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AD7734 REGISTER DESCRIPTION Table 11. Register Summary Register Addr (hex) Communications 00 I/O Port 01 Revision 02 Test 03 ADC Status 04 Checksum 05 ADC Zero-Scale Calibration 06 ADC Full-Scale 07 1 Channel Data 08–0B 1 Channel Zero-Scale Cal. 10–13 ...
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Register Access The AD7734 is configurable through a series of registers. Some of them configure and control general AD7734 features, while others are specific to each channel. The register data widths vary from 8 bits to 24 bits. All registers ...
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AD7734 I/O Port Register 8 Bits, Read/Write Register, Address 01h, Default Value 30h + Digital Input Value × 40h The bits in this register are used to configure and access the digital I/O port on the AD7734. Bit Bit 7 ...
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ADC Status Register 8 Bits, Read-Only Register, Address 04h, Default Value 00h In conversion modes, the register bits reflect the individual channel status. When a conversion is complete, the corresponding channel data register is updated and the corresponding RDY bit ...
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AD7734 Channel Zero-Scale Calibration Registers 24 Bits, Read/Write Registers, Address 10h–13h, Default Value 800000h These registers hold the particular channel zero-scale calibration coefficients. The value in these registers is used in conjunction with the value in the corresponding channel full- ...
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Channel Setup Registers 8 Bits, Read/Write Register, Address 28h–2Bh, Default Value 00h These registers are used to configure the selected channel, to configure its input voltage range, and to set up the corresponding channel status register. Bit Bit 7 Mnemonic ...
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AD7734 Mode Register 8 Bits, Read/Write Register, Address 38h–3Bh, Default Value 00h The mode register configures the part and determines its operating mode. Writing to the mode register clears the ADC status register, sets the RDY pin to a logic ...
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MD2 MD1 MD0 Operating Mode Idle Mode The default mode after power-on or reset. The AD7734 automatically returns to this mode after any calibration or after a single conversion Continuous Conversion Mode The AD7734 ...
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AD7734 DIGITAL INTERFACE DESCRIPTION Hardware The AD7734 serial interface can be connected to the host device via the serial interface in several different ways. The CS pin can be used to select the AD7734 as one of several circuits connected ...
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Reset The AD7734 can be reset by the RESET pin or by writing a reset sequence to the AD7734 serial interface. The reset sequence is N × × 1, which could be the data sequence 00h + ...
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AD7734 Dump Mode When the DUMP bit in the mode register is set to 1, the channel status register will be read immediately by a read of the channel data register, regardless of whether the status or the data register ...
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START CONTINUOUS CONVERSION SERIAL INTERFACE RDY CH0 CONVERSION START CONTINUOUS CONVERSION SERIAL INTERFACE RDY CH0 CONVERSION CS SCLK DIN 38h 48h DOUT RDY WRITE WRITE COMM. MODE COMM. REGISTER REGISTER REGISTER Continuous Read (Continuous Conversion) Mode When the Cont RD ...
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AD7734 CIRCUIT DESCRIPTION The AD7734 is a sigma-delta ADC that is intended for the measurement of wide dynamic range, low frequency signals in industrial process control, instrumentation, and PLC systems. It contains thin film resistor dividers, a multiplexer, an input ...
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Analog Input’s Extended Voltage Range The AD7734 output data code span corresponds to the nominal input voltage range. The ADC is functional outside the nominal input voltage range, but the performance might degrade. The sigma-delta modulator was designed to fully ...
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AD7734 Multiplexer, Conversion, and Data Output Timing The specified conversion time includes one or two settling and sampling periods and a scaling time. With chopping enabled (Figure 25), a conversion cycle starts with a settling time of 43 MCLK cycles ...
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Frequency Response The sigma-delta modulator runs at ½ the MCLK frequency, which is effectively the sampling frequency. Therefore, the Nyquist frequency is ¼ the MCLK frequency. The digital filter, in association with the modulator, features the frequency response of a ...
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AD7734 I/O Port The AD7734 P0 pin can be used as a general-purpose digital I/O pin. The P1 pin ( SYNC /P1) can be used as a general- purpose digital I/O pin or to synchronize the AD7734 with other devices ...
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10µF 0.1µF ANALOG INPUTS AIN0(+) 4 TO 20mA BIAS0(+) 500R AIN1 0V TO 10V BIAS1 AIN2 –10V TO +10V BIAS2 AIN3 BIAS3 BIASHI BIASLO AV DD +VIN VOUT +2.5V REFIN(+) AD780 REFIN(–) TEMP + ...
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AD7734 OUTLINE DIMENSIONS 0.15 0.10 Figure 30. 28-Lead This Shrink Small Outline Package [TSSOP] (RU-28)—Dimensions shown in millimeters ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test ...