AD7880BR-REEL Analog Devices Inc, AD7880BR-REEL Datasheet - Page 6

• Manufacturer Part Number: AD7880BR-REEL
• Description: IC ADC 12BIT MONO LP 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7880BR-REEL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Sampling Rate (per Second): 66k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 50mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)

AD7880
The AD7880 has two unipolar input ranges, 0 V to 5 V and 0 V
to 10 V. Figure 5 shows the analog input for the 0 V to 5 V
range. The designed code transitions occur midway between
successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs,
5/2 LSBs . . . FS –3/2 LSBs). The output code is straight binary
with 1 LSB = FS/4096 = 5 V/4096 = 1.22 mV. The same applies
for the 0 V to 10 V range, as shown in Figure 6, except that the
LSB size is bigger. In this case 1 LSB = FS/4096 = 10 V/4096 =
2.44 mV. The ideal input/output transfer characteristic for both
these unipolar ranges is shown in Figure 8.
Figure 7 shows the AD7880’s 5 V bipolar analog input con-
figuration. Once again the designed code transitions occur mid-
way between successive integer LSB values. The output code is
straight binary with 1 LSB = FS/4096 = 10 V/4096 = 2.44 mV.
The ideal bipolar input/output transfer characteristic is shown in
Figure 9.
000...010
OUTPUT
111...110
111...100
000...000
111...111
111...101
000...011
000...001
000...000
111...110
111...111
100...101
100...000
011...111
011...110
000...001
Figure 8. AD7880 Unipolar Transfer Characteristic
CODE
Figure 9. AD7880 Bipolar Transfer Characteristic
0V
OUTPUT
CODE
1LSB
–
FS
2
V
IN
INPUT VOLTAGE
–
V INPUT VOLTAGE
1LSB
IN
0V
1LSB =
+
1LSB
4096
1LSB =
FS
FS = 10V
+
FS – 1LSB
+
4096
FS
2
FS
–
1LSB
–6–
CLOCK INPUT
The AD7880 is specified to operate with a 2.5 MHz clock con-
nected to the CLKIN input pin. This pin may be driven directly
by CMOS or TTL buffers. The mark/space ratio on the clock
can vary from 40/60 to 60/40. As the clock frequency is slowed
down, it can result in slightly degraded accuracy performance.
This is due to leakage effects on the hold capacitor in the inter-
nal track-and-hold amplifier. Figure 10 is a typical plot of accu-
racy versus clock frequency for the ADC.
TRACK/HOLD AMPLIFIER
The charge balanced comparator used in the AD7880 for the
A/D conversion provides the user with an inherent track/hold
function. The track/hold amplifier acquires an input signal to
12-bit accuracy in less than 3 s. The overall throughput time is
equal to the conversion time plus the track/hold amplifier acqui-
sition time. For a 2.5 MHz input clock, the throughput time is
15 s.
The operation of the track/hold amplifier is essentially transpar-
ent to the user. The track/hold amplifier goes from its tracking
mode to its hold mode at the start of conversion, i.e., on the ris-
ing edge of CONVST as shown in Figure 1.
OFFSET AND FULL-SCALE ADJUSTMENT
In most Digital Signal Processing (DSP) applications, offset and
full-scale errors have little or no effect on system performance.
Offset error can always be eliminated in the analog domain by
ac coupling. Full-scale error effect is linear and does not cause
problems as long as the input signal is within the full dynamic
range of the ADC. Some applications will require that the input
signal range match the maximum possible dynamic range of the
ADC. In such applications, offset and full-scale error will have
to be adjusted to zero.
The following sections describe suggested offset and full-scale
adjustment techniques which rely on adjusting the inherent off-
set of the op amp driving the input to the ADC as well as tweak-
ing an additional external potentiometer as shown in Figure 11.
Figure 10. Normalized Linearity Error vs. Clock Frequency
2.5
1.5
1.0
0.0
2.0
0.5
0.5
1.5
CLOCK FREQUENCY – MHz
2.5
3.5
REV. 0